The following changes since commit 2ccad61746ca7de5dd3e25146062264387e43bd4:
Merge tag 'pull-tcg-20221109' of https://gitlab.com/rth7680/qemu into staging (2022-11-09 13:26:45 -0500) are available in the Git repository at: https://github.com/quic/qemu tags/pull-hex-20221110 for you to fetch changes up to f2630d5994fb716a302289d97844d1c9622f3aff: Hexagon (target/hexagon) Use direct block chaining for tight loops (2022-11-10 09:49:35 -0800) ---------------------------------------------------------------- 1) Performance improvement Add pkt and insn to DisasContext Many functions need information from all 3 structures, so merge them together. 2) Bug fix Fix predicated assignment to .tmp and .cur 3) Performance improvement Add overrides for S2_asr_r_r_sat/S2_asl_r_r_sat These functions will not be handled by idef-parser 4-11) The final 8 patches improve change-of-flow handling. Currently, we set the PC to a new address before exiting a TB. The ultimate goal is to use direct block chaining. However, several steps are needed along the way. 4) When a packet has more than one change-of-flow (COF) instruction, only the first one taken is considered. The runtime bookkeeping is only needed when there is more than one COF instruction in a packet. 5, 6) Remove PC and next_PC from the runtime state and always use a translation-time constant. Note that next_PC is used by call instructions to set LR and by conditional COF instructions to set the fall-through address. 7, 8, 9) Add helper overrides for COF instructions. In particular, we must distinguish those that use a PC-relative address for the destination. These are candidates for direct block chaining later. 10) Use direct block chaining for packets that have a single PC-relative COF instruction. Instead of generating the code while processing the instruction, we record the effect in DisasContext and generate the code during gen_end_tb. 11) Use direct block chaining for tight loops. We look for TBs that end with an endloop0 that will branch back to the TB start address. ---------------------------------------------------------------- Taylor Simpson (11): Hexagon (target/hexagon) Add pkt and insn to DisasContext Hexagon (target/hexagon) Fix predicated assignment to .tmp and .cur Hexagon (target/hexagon) Add overrides for S2_asr_r_r_sat/S2_asl_r_r_sat Hexagon (target/hexagon) Only use branch_taken when packet has multi cof Hexagon (target/hexagon) Remove PC from the runtime state Hexagon (target/hexagon) Remove next_PC from runtime state Hexagon (target/hexagon) Add overrides for direct call instructions Hexagon (target/hexagon) Add overrides for compound compare and jump Hexagon (target/hexagon) Add overrides for various forms of jump Hexagon (target/hexagon) Use direct block chaining for direct jump/branch Hexagon (target/hexagon) Use direct block chaining for tight loops target/hexagon/cpu.h | 14 +- target/hexagon/gen_tcg.h | 412 +++++++++++++++++++++++++++++++++++- target/hexagon/gen_tcg_hvx.h | 6 +- target/hexagon/insn.h | 9 +- target/hexagon/macros.h | 16 +- target/hexagon/mmvec/macros.h | 4 +- target/hexagon/translate.h | 20 +- target/hexagon/decode.c | 15 +- target/hexagon/genptr.c | 392 +++++++++++++++++++++++++++++++++- target/hexagon/op_helper.c | 28 ++- target/hexagon/translate.c | 229 +++++++++++++------- tests/tcg/hexagon/hvx_misc.c | 72 +++++++ tests/tcg/hexagon/usr.c | 34 ++- target/hexagon/gen_helper_funcs.py | 13 +- target/hexagon/gen_helper_protos.py | 14 +- target/hexagon/gen_tcg_funcs.py | 38 +++- target/hexagon/hex_common.py | 29 ++- 17 files changed, 1207 insertions(+), 138 deletions(-)
