Hi, This ostensibly fixes a bug with gdbstub when accessing the GIC state (via system registers). It also proposes a pattern for removing current_cpu/qtest_enabled() hacks in hw/ by passing the cpu index via MemTxAttrs. For the ARM timer code we also assert that those accesses do come from a CPU (as opposed to HW DMA attempting to overwrite stuff).
We do need to audit helpers in target/ which use the address_space API to read and write data and ensure they properly form their MxTxAttrs so this works cleanly. What do people think? Alex Bennée (4): hw: encode accessing CPU index in MemTxAttrs qtest: make read/write operation appear to be from CPU hw/intc/gic: use MxTxAttrs to divine accessing CPU hw/timer: convert mptimer access to attrs to derive cpu index include/exec/memattrs.h | 4 +++- accel/tcg/cputlb.c | 22 ++++++++++++++++------ hw/core/cpu-sysemu.c | 17 +++++++++++++---- hw/intc/arm_gic.c | 39 ++++++++++++++++++++++----------------- hw/timer/arm_mptimer.c | 25 ++++++++++++++----------- softmmu/qtest.c | 31 +++++++++++++++++++------------ 6 files changed, 87 insertions(+), 51 deletions(-) -- 2.34.1
