This is the S390 specific changes required to reduce the
amount of translation for address space randomization.
r~
Based-on: 20220906091126.298041-1-richard.hender...@linaro.org
("[PATCH v4 0/7] tcg: pc-relative translation blocks")
branch: https://gitlab.com/rth7680/qemu/-/tree/tgt-s90x-pcrel
Richard Henderson (26):
target/s390x: Use tcg_constant_* in local contexts
target/s390x: Use tcg_constant_* for DisasCompare
target/s390x: Use tcg_constant_i32 for fpinst_extract_m34
target/s390x: Use tcg_constant_* in translate_vx.c.inc
target/s390x: Change help_goto_direct to work on displacements
target/s390x: Introduce gen_psw_addr_disp
target/s390x: Remove pc argument to pc_to_link_into
target/s390x: Use gen_psw_addr_disp in pc_to_link_info
target/s390x: Use gen_psw_addr_disp in save_link_info
target/s390x: Use gen_psw_addr_disp in op_sam
target/s390x: Use ilen instead in branches
target/s390x: Move masking of psw.addr to cpu_get_tb_cpu_state
target/s390x: Add disp argument to update_psw_addr
target/s390x: Don't set gbea for user-only
target/s390x: Introduce per_enabled
target/s390x: Disable conditional branch-to-next for PER
target/s390x: Introduce help_goto_indirect
target/s390x: Split per_branch
target/s390x: Simplify help_branch
target/s390x: Split per_breaking_event from per_branch_*
target/s390x: Remove PER check from use_goto_tb
target/s390x: Pass original r2 register to BCR
tcg: Pass TCGTempKind to tcg_temp_new_internal
tcg: Introduce tcg_temp_ebb_new_*
tcg: Introduce tcg_temp_is_normal_*
target/s390x: Enable TARGET_TB_PCREL
include/tcg/tcg-op.h | 4 +
include/tcg/tcg.h | 49 +-
target/s390x/cpu-param.h | 1 +
target/s390x/cpu.h | 13 +-
target/s390x/cpu.c | 14 +-
target/s390x/tcg/translate.c | 858 ++++++++++++----------------
tcg/tcg.c | 14 +-
target/s390x/tcg/translate_vx.c.inc | 45 +-
target/s390x/tcg/insn-data.def | 2 +-
9 files changed, 458 insertions(+), 542 deletions(-)
--
2.34.1
