These patches add the ARM Cortex-R52. The biggest addition is
an implementation of the armv8-r MPU.
The last patch adds a machine that combines the new core with
an UART and a GIC. This machine can run many samples of
the Zephyr OS.
All information is taken from:
- ARM Cortex-R52 TRM revision r1p3
- ARM Architecture Reference Manual Supplement
-ARMv8 for the ARMv8-R AArch32 architecture profile Version A.c
Functionality that is not implemented:
- Changing between single and double precision floats
- Some hypervisor related functionality (HCR.T(R)VM,HADFSR,...)
Tobias Röhmel (11):
target/arm: Add ARM_FEATURE_V8_R
target/arm: Add ARM Cortex-R52 cpu
target/arm: Add v8R MIDR register
target/arm: Make RVBAR available for non AARCH64 CPUs
target/arm: Make stage_2_format for cache attributes optional
target/arm: Add ARMCacheAttrs to the signature of pmsav8_mpu_lookup
target/arm: Enable TTBCR_EAE for ARM_FEATURE_V8_R
target/arm Add PMSAv8r registers
target/arm: Add PMSAv8r functionality
target/arm: Make SPSR_hyp accessible for Cortex-R52
hw/arm: Add R52 machine
configs/devices/arm-softmmu/default.mak | 1 +
hw/arm/Kconfig | 5 +
hw/arm/meson.build | 1 +
hw/arm/r52_machine.c | 133 +++++++++++++++
hw/arm/r52_virt.c | 217 ++++++++++++++++++++++++
include/hw/arm/r52_virt.h | 61 +++++++
target/arm/cpu.c | 10 +-
target/arm/cpu.h | 11 ++
target/arm/cpu_tcg.c | 54 ++++++
target/arm/helper.c | 184 +++++++++++++++++++-
target/arm/internals.h | 13 +-
target/arm/m_helper.c | 3 +-
target/arm/op_helper.c | 8 +
target/arm/ptw.c | 191 ++++++++++++++++++---
target/arm/translate.c | 5 +-
15 files changed, 859 insertions(+), 38 deletions(-)
create mode 100644 hw/arm/r52_machine.c
create mode 100644 hw/arm/r52_virt.c
create mode 100644 include/hw/arm/r52_virt.h
--
2.25.1
