On Thu, 14 Jul 2022 at 15:54, Tobias Roehmel <quic_troh...@quicinc.com> wrote:
>
> From: Tobias Röhmel <quic_troh...@quicinc.com>
>
> The ARM Cortex-R52 is not AARCH64 but uses RVBAR.
>
> Signed-off-by: Tobias Röhmel <quic_troh...@quicinc.com>
> ---
> target/arm/cpu.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index 1b5d535788..2c26a5387d 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -258,6 +258,10 @@ static void arm_cpu_reset(DeviceState *dev)
> env->cp15.cpacr_el1 = FIELD_DP64(env->cp15.cpacr_el1,
> CPACR, CP11, 3);
> #endif
> + if (arm_feature(env, ARM_FEATURE_V8_R)) {
> + env->cp15.rvbar = cpu->rvbar_prop;
> + env->regs[15] = cpu->rvbar_prop;
> + }
> }
>
> #if defined(CONFIG_USER_ONLY)
> @@ -1273,7 +1277,8 @@ void arm_cpu_post_init(Object *obj)
> qdev_property_add_static(DEVICE(obj),
> &arm_cpu_reset_hivecs_property);
> }
>
> - if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) {
> + if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64) ||
> + arm_feature(&cpu->env, ARM_FEATURE_V8_R)) {
Rather than doing this, we should correct the feature bit
being tested -- the RVBAR register itself is present on all
v8 CPUs, so we should correspondingly provide the property on
all v8 CPUs, by checking ARM_FEATURE_V8 (ie the same check we
use for whether to add the RVBAR register definition).
> object_property_add_uint64_ptr(obj, "rvbar",
> &cpu->rvbar_prop,
> OBJ_PROP_FLAG_READWRITE);
> --
thanks
-- PMM
