On Wed, 6 Jul 2022 at 09:38, Richard Henderson <richard.hender...@linaro.org> wrote: > > This new behaviour is in the ARM pseudocode function > AArch64.CheckFPAdvSIMDEnabled, which applies to AArch32 > via AArch32.CheckAdvSIMDOrFPEnabled when the EL to which > the trap would be delivered is in AArch64 mode. > > Given that ARMv9 drops support for AArch32 outside EL0, the trap EL > detection ought to be trivially true, but the pseudocode still contains > a number of conditions, and QEMU has not yet committed to dropping A32 > support for EL[12] when v9 features are present. > > Since the computation of SME_TRAP_NONSTREAMING is necessarily different > for the two modes, we might as well preserve bits within TBFLAG_ANY and > allocate separate bits within TBFLAG_A32 and TBFLAG_A64 instead. > > Note that DDI0616A.a has typos for bits [22:21] of LD1RO in the table > of instructions illegal in streaming mode. > > Signed-off-by: Richard Henderson <richard.hender...@linaro.org> > ---
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> thanks -- PMM
