Changes for v5:
* Use macros for vertical tile slice addressing.
* Other misc adjustments per review.
Patches without r-b:
03-target-arm-Trap-non-streaming-usage-when-Streamin.patch
07-target-arm-Mark-PMULL-FMMLA-as-non-streaming.patch
19-target-arm-Implement-SME-MOVA.patch
20-target-arm-Implement-SME-LD1-ST1.patch
23-target-arm-Implement-SME-ADDHA-ADDVA.patch
24-target-arm-Implement-FMOPA-FMOPS-non-widening.patch
25-target-arm-Implement-BFMOPA-BFMOPS.patch
26-target-arm-Implement-FMOPA-FMOPS-widening.patch
35-linux-user-aarch64-Add-SM-bit-to-SVE-signal-conte.patch
37-linux-user-aarch64-Do-not-allow-duplicate-or-shor.patch
r~
Richard Henderson (45):
target/arm: Handle SME in aarch64_cpu_dump_state
target/arm: Add infrastructure for disas_sme
target/arm: Trap non-streaming usage when Streaming SVE is active
target/arm: Mark ADR as non-streaming
target/arm: Mark RDFFR, WRFFR, SETFFR as non-streaming
target/arm: Mark BDEP, BEXT, BGRP, COMPACT, FEXPA, FTSSEL as
non-streaming
target/arm: Mark PMULL, FMMLA as non-streaming
target/arm: Mark FTSMUL, FTMAD, FADDA as non-streaming
target/arm: Mark SMMLA, UMMLA, USMMLA as non-streaming
target/arm: Mark string/histo/crypto as non-streaming
target/arm: Mark gather/scatter load/store as non-streaming
target/arm: Mark gather prefetch as non-streaming
target/arm: Mark LDFF1 and LDNF1 as non-streaming
target/arm: Mark LD1RO as non-streaming
target/arm: Add SME enablement checks
target/arm: Handle SME in sve_access_check
target/arm: Implement SME RDSVL, ADDSVL, ADDSPL
target/arm: Implement SME ZERO
target/arm: Implement SME MOVA
target/arm: Implement SME LD1, ST1
target/arm: Export unpredicated ld/st from translate-sve.c
target/arm: Implement SME LDR, STR
target/arm: Implement SME ADDHA, ADDVA
target/arm: Implement FMOPA, FMOPS (non-widening)
target/arm: Implement BFMOPA, BFMOPS
target/arm: Implement FMOPA, FMOPS (widening)
target/arm: Implement SME integer outer product
target/arm: Implement PSEL
target/arm: Implement REVD
target/arm: Implement SCLAMP, UCLAMP
target/arm: Reset streaming sve state on exception boundaries
target/arm: Enable SME for -cpu max
linux-user/aarch64: Clear tpidr2_el0 if CLONE_SETTLS
linux-user/aarch64: Reset PSTATE.SM on syscalls
linux-user/aarch64: Add SM bit to SVE signal context
linux-user/aarch64: Tidy target_restore_sigframe error return
linux-user/aarch64: Do not allow duplicate or short sve records
linux-user/aarch64: Verify extra record lock succeeded
linux-user/aarch64: Move sve record checks into restore
linux-user/aarch64: Implement SME signal handling
linux-user: Rename sve prctls
linux-user/aarch64: Implement PR_SME_GET_VL, PR_SME_SET_VL
target/arm: Only set ZEN in reset if SVE present
target/arm: Enable SME for user-only
linux-user/aarch64: Add SME related hwcap entries
docs/system/arm/emulation.rst | 4 +
linux-user/aarch64/target_cpu.h | 5 +-
linux-user/aarch64/target_prctl.h | 56 +-
target/arm/cpu.h | 7 +
target/arm/helper-sme.h | 126 ++++
target/arm/helper-sve.h | 4 +
target/arm/helper.h | 18 +
target/arm/translate-a64.h | 45 ++
target/arm/translate.h | 16 +
target/arm/sme-fa64.decode | 60 ++
target/arm/sme.decode | 88 +++
target/arm/sve.decode | 41 +-
linux-user/aarch64/cpu_loop.c | 9 +
linux-user/aarch64/signal.c | 243 ++++++-
linux-user/elfload.c | 20 +
linux-user/syscall.c | 28 +-
target/arm/cpu.c | 35 +-
target/arm/cpu64.c | 11 +
target/arm/helper.c | 56 +-
target/arm/sme_helper.c | 1124 +++++++++++++++++++++++++++++
target/arm/sve_helper.c | 28 +
target/arm/translate-a64.c | 103 ++-
target/arm/translate-sme.c | 373 ++++++++++
target/arm/translate-sve.c | 393 ++++++++--
target/arm/translate-vfp.c | 12 +
target/arm/translate.c | 2 +
target/arm/vec_helper.c | 24 +
target/arm/meson.build | 3 +
28 files changed, 2799 insertions(+), 135 deletions(-)
create mode 100644 target/arm/sme-fa64.decode
create mode 100644 target/arm/sme.decode
create mode 100644 target/arm/translate-sme.c
--
2.34.1
