From: Alistair Francis <alistair.fran...@wdc.com> The RISC-V CPUs have been incorrectly enabling features in the named vendor CPUs that aren't enabled in hardware. This patchset changes this so that named vendor CPUs are not runtime configurable.
I was torn for the best approach here. The other idea I had was to disable features by default and instead enable them in CPUs. I ended up going this approach as I felt it made more sense to not expose configuration options for vendor CPUs, it just seems difficult to support now that we have a large list of CPUs Alistair Francis (2): target/riscv: Don't expose the CPU properties on names CPUs target/riscv: Run extension checks for all CPUs target/riscv/cpu.c | 217 ++++++++++++++++++++++++++------------------- 1 file changed, 125 insertions(+), 92 deletions(-) -- 2.35.1
