On Mon, 11 Apr 2022 at 10:50, Gavin Shan <[email protected]> wrote: > On 4/11/22 5:22 PM, Peter Maydell wrote: > > So, can you give an example of coprocessor registers which are > > not 8 bytes in size? How are they accessed by the guest? > > If we need to support them then we need to support them, but this > > cover letter/series doesn't seem to me to provide enough detail > > to make the case that they really are necessary. > > > > Also, we support SVE today, and we don't have variable size > > coprocessor registers. Is there a bug here that we would be > > fixing ? > > > > [Cc Oliver Upon] > > Apart from SVE registers, I don't think we have any more large registers > whose sizes exceed 8 bytes for now, until SDEI virtualization needs more > large registers for migration. > > I'm working the KVM series to support SDEI virtualization and last revision > is v6. One of the requirement is to migrate the SDEI events and states. > In v5, the migration is done by the dedicated ioctl commands and it was > suggested by Oliver to use {GET, SET}_ONE_REG. Note that the series isn't > merged yet. So I had the prototype to support SDEI's migration through > {GET, SET}_ONE_REG. Note that those newly added registers are inaccessible > from guest. > > https://github.com/gwshan/linux/commit/c2e5de5e210de6b003d1e1330eeb0958cf7007f5 > (branch: kvm/arm64_sdei) > > https://lore.kernel.org/lkml/[email protected]/T/ > (last revision: v6) > https://lore.kernel.org/kvmarm/[email protected]/ > (v5)
Could you please describe what you're trying to do here rather than asking me to wade through a big kernel patchset that's adding support for a firmware interface I don't know? > There are large coprocessor register sizes, like U2048, exposed by KVM. > However, it seems we never support those large coprocessor registers. > I'm not sure if we have any challenges to support those large registers, > or we don't have the needs yet? The general idea of the coprocessor register accessors for aarch64 KVM is that we're giving the VMM access to the same registers that the guest accesses via the msr/mrs instructions. Those instructions by definition access 64 bit quantities. In a few places we've borrowed this mechanism to define KVM-specific pseudo-registers, but that wasn't the primary design intent. So maybe it makes sense to extend it to do what you're trying to, or maybe that would be the tail wagging the dog. It's hard to tell without more detail on what exactly you're trying to expose to the VMM here. (The ONE_REG API is used by more than just aarch64 and more than just for coprocessor registers, which is why it supports lots of different sizes.) thanks -- PMM
