On 3/28/22 14:14, matheus.fe...@eldorado.org.br wrote:
From: Matheus Ferst <matheus.fe...@eldorado.org.br>Implement the following PowerISA v3.1 instructions: xscvsqqp: VSX Scalar Convert with round Signed Quadword to Quad-Precision xscvuqqp: VSX Scalar Convert with round Unsigned Quadword to Quad-Precision format Signed-off-by: Matheus Ferst <matheus.fe...@eldorado.org.br> --- target/ppc/fpu_helper.c | 11 +++++++++++ target/ppc/helper.h | 2 ++ target/ppc/insn32.decode | 5 +++++ target/ppc/translate/vsx-impl.c.inc | 20 ++++++++++++++++++++ 4 files changed, 38 insertions(+) diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 7e8be99cc0..5101ba92ae 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -3058,6 +3058,17 @@ void helper_##op(CPUPPCState *env, ppc_vsr_t *xt, ppc_vsr_t *xb) \ VSX_CVT_INT_TO_FP2(xvcvsxdsp, int64, float32) VSX_CVT_INT_TO_FP2(xvcvuxdsp, uint64, float32)+#define VSX_CVT_INT128_TO_FP(op, tp) \+void helper_##op(CPUPPCState *env, ppc_vsr_t *xt, ppc_vsr_t *xb) \ +{ \ + xt->f128 = tp##_to_float128(xb->VsrD(0), xb->VsrD(1), &env->fp_status); \ + helper_compute_fprf_float128(env, xt->f128); \ + do_float_check_status(env, GETPC()); \ +}
There seems to be some lack of reset_fpstatus all through the conversion routines. Otherwise, Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~
