We have 3 hosts that naturally produce sign-extended values, and have to work extra hard (with 1 or 2 insns) to produce the zero-extended address that we expect today.
However, it's a simple matter of arithmetic for the middle-end to require sign-extended addresses instead. For user-only, we do have to be careful not to allow a guest object to wrap around the signed boundary, but that's fairly easily done. Tested with aarch64, as that's the best hw currently available. Patches lacking review: 03-accel-tcg-Support-TCG_TARGET_SIGNED_ADDR32-for-so.patch 06-tcg-aarch64-Support-TCG_TARGET_SIGNED_ADDR32.patch 07-tcg-mips-Support-TCG_TARGET_SIGNED_ADDR32.patch 09-tcg-loongarch64-Support-TCG_TARGET_SIGNED_ADDR32.patch (new) r~ Version 1: https://lore.kernel.org/qemu-devel/20211010174401.141339-1-richard.hender...@linaro.org/ Richard Henderson (9): tcg: Add TCG_TARGET_SIGNED_ADDR32 accel/tcg: Split out g2h_tlbe accel/tcg: Support TCG_TARGET_SIGNED_ADDR32 for softmmu accel/tcg: Add guest_base_signed_addr32 for user-only linux-user: Support TCG_TARGET_SIGNED_ADDR32 tcg/aarch64: Support TCG_TARGET_SIGNED_ADDR32 tcg/mips: Support TCG_TARGET_SIGNED_ADDR32 tcg/riscv: Support TCG_TARGET_SIGNED_ADDR32 tcg/loongarch64: Support TCG_TARGET_SIGNED_ADDR32 include/exec/cpu-all.h | 20 +++++++-- include/exec/cpu_ldst.h | 3 +- tcg/aarch64/tcg-target-sa32.h | 7 ++++ tcg/arm/tcg-target-sa32.h | 1 + tcg/i386/tcg-target-sa32.h | 1 + tcg/loongarch64/tcg-target-sa32.h | 1 + tcg/mips/tcg-target-sa32.h | 9 ++++ tcg/ppc/tcg-target-sa32.h | 1 + tcg/riscv/tcg-target-sa32.h | 5 +++ tcg/s390x/tcg-target-sa32.h | 1 + tcg/sparc/tcg-target-sa32.h | 1 + tcg/tci/tcg-target-sa32.h | 1 + accel/tcg/cputlb.c | 36 +++++++++++----- bsd-user/main.c | 4 ++ linux-user/elfload.c | 62 +++++++++++++++++++++------ linux-user/main.c | 3 ++ tcg/tcg.c | 4 ++ tcg/aarch64/tcg-target.c.inc | 69 ++++++++++++++++++++----------- tcg/loongarch64/tcg-target.c.inc | 15 +++---- tcg/mips/tcg-target.c.inc | 10 +---- tcg/riscv/tcg-target.c.inc | 8 +--- 21 files changed, 187 insertions(+), 75 deletions(-) create mode 100644 tcg/aarch64/tcg-target-sa32.h create mode 100644 tcg/arm/tcg-target-sa32.h create mode 100644 tcg/i386/tcg-target-sa32.h create mode 100644 tcg/loongarch64/tcg-target-sa32.h create mode 100644 tcg/mips/tcg-target-sa32.h create mode 100644 tcg/ppc/tcg-target-sa32.h create mode 100644 tcg/riscv/tcg-target-sa32.h create mode 100644 tcg/s390x/tcg-target-sa32.h create mode 100644 tcg/sparc/tcg-target-sa32.h create mode 100644 tcg/tci/tcg-target-sa32.h -- 2.25.1
