From: Yifei Jiang <jiangyi...@huawei.com> Add riscv kvm support in meson.build file.
Signed-off-by: Yifei Jiang <jiangyi...@huawei.com> Signed-off-by: Mingwang Li <limingw...@huawei.com> Reviewed-by: Alistair Francis <alistair.fran...@wdc.com> Reviewed-by: Anup Patel <a...@brainfault.org> Message-id: 20220112081329.1835-14-jiangyi...@huawei.com Signed-off-by: Alistair Francis <alistair.fran...@wdc.com> --- meson.build | 2 ++ 1 file changed, 2 insertions(+) diff --git a/meson.build b/meson.build index 333c61deba..833fd6bc4c 100644 --- a/meson.build +++ b/meson.build @@ -90,6 +90,8 @@ elif cpu in ['ppc', 'ppc64'] kvm_targets = ['ppc-softmmu', 'ppc64-softmmu'] elif cpu in ['mips', 'mips64'] kvm_targets = ['mips-softmmu', 'mipsel-softmmu', 'mips64-softmmu', 'mips64el-softmmu'] +elif cpu in ['riscv'] + kvm_targets = ['riscv32-softmmu', 'riscv64-softmmu'] else kvm_targets = [] endif -- 2.31.1
