On Mon, Jan 10, 2022 at 03:15:39PM -0300, Fabiano Rosas wrote: > Some bits described in the user manual are missing from msr_mask. Add > them. > > Signed-off-by: Fabiano Rosas <faro...@linux.ibm.com> > --- > target/ppc/cpu_init.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c > index e30e86fe9d..a50ddaeaae 100644 > --- a/target/ppc/cpu_init.c > +++ b/target/ppc/cpu_init.c > @@ -2535,15 +2535,19 @@ POWERPC_FAMILY(405)(ObjectClass *oc, void *data) > PPC_MEM_SYNC | PPC_MEM_EIEIO | > PPC_40x_TLB | PPC_MEM_TLBIA | PPC_MEM_TLBSYNC | > PPC_4xx_COMMON | PPC_405_MAC | PPC_40x_EXCP; > - pcc->msr_mask = (1ull << MSR_POW) | > + pcc->msr_mask = (1ull << MSR_AP) | > + (1ull << MSR_POW) |
If I'm looking at things correctly, the "MSR_POW" bit on 405 is
actually called "MSR_WE", which appears related, but not quite
identical. I think it would be good to introduce a new define to get
it a name matching the user manual.
> (1ull << MSR_CE) |
> (1ull << MSR_EE) |
> (1ull << MSR_PR) |
> (1ull << MSR_FP) |
> + (1ull << MSR_ME) |
> (1ull << MSR_DWE) |
> (1ull << MSR_DE) |
> + (1ull << MSR_FE1) |
> (1ull << MSR_IR) |
> (1ull << MSR_DR);
> +
> pcc->mmu_model = POWERPC_MMU_SOFT_4xx;
> pcc->excp_model = POWERPC_EXCP_40x;
> pcc->bus_model = PPC_FLAGS_INPUT_405;
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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