Hi All: This series tries to introduce PASID support for Intel IOMMU. The work is based on the previous scalabe mode support by implement the ECAP_PASID. A new "x-pasid-mode" is introduced to enable this mode. All internal vIOMMU codes were extended to support PASID instead of the current RID2PASID method. The code is also capable of provisiong address space with PASID. Note that no devices can issue PASID DMA right now, this needs future work.
This will be used for prototying PASID based device like virito or future vPASID support for Intel IOMMU. Test has been done with the Linux guest with scalalbe mode enabled and disabled. A virtio prototype[1][2] that can issue PAISD based DMA request were also tested. This series depends on the fix of passthrough mode: https://lore.kernel.org/all/20211222063956.2871-1-jasow...@redhat.com/T/ Please review. [1] https://github.com/jasowang/qemu.git virtio-pasid [2] https://github.com/jasowang/linux.git virtio-pasid Jason Wang (3): intel-iommu: don't warn guest errors when getting rid2pasid entry intel-iommu: drop VTDBus intel-iommu: PASID support hw/i386/intel_iommu.c | 538 +++++++++++++++++++++------------ hw/i386/intel_iommu_internal.h | 14 +- hw/i386/trace-events | 2 + include/hw/i386/intel_iommu.h | 16 +- include/hw/pci/pci_bus.h | 2 + 5 files changed, 359 insertions(+), 213 deletions(-) -- 2.25.1