On Sat, Nov 13, 2021 at 1:20 AM Frédéric Pétrot
<frederic.pet...@univ-grenoble-alpes.fr> wrote:
>
> The 128-bit bitwise instructions do not need any function prototype change
> as the functions can be applied independently on the lower and upper part of
> the registers.
>
> Signed-off-by: Frédéric Pétrot <frederic.pet...@univ-grenoble-alpes.fr>
> Co-authored-by: Fabien Portas <fabien.por...@grenoble-inp.org>
Reviewed-by: Alistair Francis <alistair.fran...@wdc.com>
Alistair
> ---
> target/riscv/translate.c | 21 +++++++++++++++++++--
> 1 file changed, 19 insertions(+), 2 deletions(-)
>
> diff --git a/target/riscv/translate.c b/target/riscv/translate.c
> index 554cf05084..508ae87985 100644
> --- a/target/riscv/translate.c
> +++ b/target/riscv/translate.c
> @@ -448,7 +448,15 @@ static bool gen_logic_imm_fn(DisasContext *ctx, arg_i *a,
>
> func(dest, src1, a->imm);
>
> - gen_set_gpr(ctx, a->rd, dest);
> + if (get_xl(ctx) == MXL_RV128) {
> + TCGv src1h = get_gprh(ctx, a->rs1);
> + TCGv desth = dest_gprh(ctx, a->rd);
> +
> + func(desth, src1h, -(a->imm < 0));
> + gen_set_gpr128(ctx, a->rd, dest, desth);
> + } else {
> + gen_set_gpr(ctx, a->rd, dest);
> + }
>
> return true;
> }
> @@ -462,7 +470,16 @@ static bool gen_logic(DisasContext *ctx, arg_r *a,
>
> func(dest, src1, src2);
>
> - gen_set_gpr(ctx, a->rd, dest);
> + if (get_xl(ctx) == MXL_RV128) {
> + TCGv src1h = get_gprh(ctx, a->rs1);
> + TCGv src2h = get_gprh(ctx, a->rs2);
> + TCGv desth = dest_gprh(ctx, a->rd);
> +
> + func(desth, src1h, src2h);
> + gen_set_gpr128(ctx, a->rd, dest, desth);
> + } else {
> + gen_set_gpr(ctx, a->rd, dest);
> + }
>
> return true;
> }
> --
> 2.33.1
>
>
