On 10/21/21 12:45 PM, matheus.fe...@eldorado.org.br wrote:
+ if (ctx->le_mode) {
+ gen_addr_add(ctx, ea, ea, 8);
+ offset = -8;
+ } else {
+ offset = 8;
+ }
+
+ if (store) {
+ get_cpu_vsrh(xt, rt);
+ tcg_gen_qemu_st_i64(xt, ea, ctx->mem_idx, mop);
+ gen_addr_add(ctx, ea, ea, offset);
+ get_cpu_vsrl(xt, rt);
+ tcg_gen_qemu_st_i64(xt, ea, ctx->mem_idx, mop);
+ } else {
+ tcg_gen_qemu_ld_i64(xt, ea, ctx->mem_idx, mop);
+ set_cpu_vsrh(rt, xt);
+ gen_addr_add(ctx, ea, ea, offset);
+ tcg_gen_qemu_ld_i64(xt, ea, ctx->mem_idx, mop);
+ set_cpu_vsrl(rt, xt);
+ }
Actually, I'm going to reverse myself again.
This has a behaviour change: for LE, the first access is to EA+8 instead of EA. Thus the
SIGSEGV for a load from NULL will report address 8 not 0, which is probably not the
correct result.
r~
