Re: [PATCH v3 20/21] target/riscv: adding 128-bit access functions for some csrs

[Richard Henderson]

On 10/19/21 2:48 AM, Frédéric Pétrot wrote:

+static RISCVException read_mstatus_i128(CPURISCVState *env, int csrno,
+                                   Int128 *val)
+{
+    *val = int128_make128(env->mstatus, env->mstatush);
+    return RISCV_EXCP_NONE;
+}

Needs updating from split SD bit.  I suggest

    uint64_t val64;
    read_mstatus(env, CSR_MSTATUS, &val64);
    *val = int128_make128(val64 & MSTATUS64_SD, val64 & MSTATUS64_SD);

+static RISCVException write_mstatus_i128(CPURISCVState *env, int csrno,
+                                        Int128 val)
+{

...

+    dirty = ((int128_getlo(mstatus) & MSTATUS_FS) == MSTATUS_FS) |
+            ((int128_getlo(mstatus) & MSTATUS_XS) == MSTATUS_XS);
+    if (dirty) {
+        if (riscv_cpu_is_32bit(env)) {
+            mstatus = int128_make64(int128_getlo(mstatus) | MSTATUS32_SD);
+        } else if (riscv_cpu_is_64bit(env)) {
+            mstatus = int128_make64(int128_getlo(mstatus) | MSTATUS64_SD);
+        } else {
+            mstatus = int128_or(mstatus, int128_make128(0, MSTATUSH128_SD));
+        }
+    }

Needs updating for change to SD.
Now you can defer everything to the 64-bit write_mstatus.


r~