On Sat, Sep 25, 2021 at 9:37 PM Philippe Mathieu-Daudé <f4...@amsat.org> wrote: > > Our device have 2 different I/O regions: > - a 16550 UART mapped for 32-bit accesses > - 13 extra registers > > Instead of mapping each region on the main bus, introduce > a container, map the 2 devices regions on the container, > and map the container on the main bus. > > Before: > > (qemu) info mtree > ... > 0000000020100000-000000002010001f (prio 0, i/o): serial > 0000000020100020-000000002010101f (prio 0, i/o): mchp.pfsoc.mmuart > 0000000020102000-000000002010201f (prio 0, i/o): serial > 0000000020102020-000000002010301f (prio 0, i/o): mchp.pfsoc.mmuart > 0000000020104000-000000002010401f (prio 0, i/o): serial > 0000000020104020-000000002010501f (prio 0, i/o): mchp.pfsoc.mmuart > 0000000020106000-000000002010601f (prio 0, i/o): serial > 0000000020106020-000000002010701f (prio 0, i/o): mchp.pfsoc.mmuart > > After: > > (qemu) info mtree > ... > 0000000020100000-0000000020100fff (prio 0, i/o): mchp.pfsoc.mmuart > 0000000020100000-000000002010001f (prio 0, i/o): serial > 0000000020100020-0000000020100fff (prio 0, i/o): mchp.pfsoc.mmuart.regs > 0000000020102000-0000000020102fff (prio 0, i/o): mchp.pfsoc.mmuart > 0000000020102000-000000002010201f (prio 0, i/o): serial > 0000000020102020-0000000020102fff (prio 0, i/o): mchp.pfsoc.mmuart.regs > 0000000020104000-0000000020104fff (prio 0, i/o): mchp.pfsoc.mmuart > 0000000020104000-000000002010401f (prio 0, i/o): serial > 0000000020104020-0000000020104fff (prio 0, i/o): mchp.pfsoc.mmuart.regs > 0000000020106000-0000000020106fff (prio 0, i/o): mchp.pfsoc.mmuart > 0000000020106000-000000002010601f (prio 0, i/o): serial > 0000000020106020-0000000020106fff (prio 0, i/o): mchp.pfsoc.mmuart.regs > > Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> > --- > include/hw/char/mchp_pfsoc_mmuart.h | 1 + > hw/char/mchp_pfsoc_mmuart.c | 11 ++++++++--- > 2 files changed, 9 insertions(+), 3 deletions(-) >
Reviewed-by: Bin Meng <bin.m...@windriver.com> Tested-by: Bin Meng <bin.m...@windriver.com>
