On Thu, Sep 2, 2021 at 9:19 AM Philippe Mathieu-Daudé <f4...@amsat.org>
wrote:
> Restrict cpu_exec_interrupt() and its callees to sysemu.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org>
> ---
> target/sh4/cpu.h | 4 ++--
> target/sh4/cpu.c | 2 +-
> target/sh4/helper.c | 9 ++-------
> 3 files changed, 5 insertions(+), 10 deletions(-)
>
> Reviewed-by: Warner Losh <i...@bsdimp.com>
> diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
> index 01c43440822..017a7702140 100644
> --- a/target/sh4/cpu.h
> +++ b/target/sh4/cpu.h
> @@ -204,8 +204,6 @@ struct SuperHCPU {
> };
>
>
> -void superh_cpu_do_interrupt(CPUState *cpu);
> -bool superh_cpu_exec_interrupt(CPUState *cpu, int int_req);
> void superh_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
> hwaddr superh_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
> int superh_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
> @@ -223,6 +221,8 @@ bool superh_cpu_tlb_fill(CPUState *cs, vaddr address,
> int size,
>
> void sh4_cpu_list(void);
> #if !defined(CONFIG_USER_ONLY)
> +void superh_cpu_do_interrupt(CPUState *cpu);
> +bool superh_cpu_exec_interrupt(CPUState *cpu, int int_req);
> void cpu_sh4_invalidate_tlb(CPUSH4State *s);
> uint32_t cpu_sh4_read_mmaped_itlb_addr(CPUSH4State *s,
> hwaddr addr);
> diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c
> index 83269229421..2047742d03c 100644
> --- a/target/sh4/cpu.c
> +++ b/target/sh4/cpu.c
> @@ -236,10 +236,10 @@ static const struct SysemuCPUOps sh4_sysemu_ops = {
> static const struct TCGCPUOps superh_tcg_ops = {
> .initialize = sh4_translate_init,
> .synchronize_from_tb = superh_cpu_synchronize_from_tb,
> - .cpu_exec_interrupt = superh_cpu_exec_interrupt,
> .tlb_fill = superh_cpu_tlb_fill,
>
> #ifndef CONFIG_USER_ONLY
> + .cpu_exec_interrupt = superh_cpu_exec_interrupt,
> .do_interrupt = superh_cpu_do_interrupt,
> .do_unaligned_access = superh_cpu_do_unaligned_access,
> .io_recompile_replay_branch = superh_io_recompile_replay_branch,
> diff --git a/target/sh4/helper.c b/target/sh4/helper.c
> index 2d622081e85..53cb9c3b631 100644
> --- a/target/sh4/helper.c
> +++ b/target/sh4/helper.c
> @@ -45,11 +45,6 @@
>
> #if defined(CONFIG_USER_ONLY)
>
> -void superh_cpu_do_interrupt(CPUState *cs)
> -{
> - cs->exception_index = -1;
> -}
> -
> int cpu_sh4_is_cached(CPUSH4State *env, target_ulong addr)
> {
> /* For user mode, only U0 area is cacheable. */
> @@ -784,8 +779,6 @@ int cpu_sh4_is_cached(CPUSH4State * env, target_ulong
> addr)
> return 0;
> }
>
> -#endif
> -
> bool superh_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
> {
> if (interrupt_request & CPU_INTERRUPT_HARD) {
> @@ -803,6 +796,8 @@ bool superh_cpu_exec_interrupt(CPUState *cs, int
> interrupt_request)
> return false;
> }
>
> +#endif /* !CONFIG_USER_ONLY */
> +
> bool superh_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
> MMUAccessType access_type, int mmu_idx,
> bool probe, uintptr_t retaddr)
> --
> 2.31.1
>
>
