[PATCH 27/29] tcg_i386_funcs: Add cpu_x86_update_dr7 to TCGI386ModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kra...@redhat.com>
---
 include/tcg/tcg-module-i386.h       | 1 +
 target/i386/cpu.h                   | 1 -
 accel/tcg/tcg-module-i386.c         | 5 +++++
 target/i386/machine.c               | 2 +-
 target/i386/tcg/seg_helper.c        | 2 +-
 target/i386/tcg/sysemu/bpt_helper.c | 9 ++++++++-
 6 files changed, 16 insertions(+), 4 deletions(-)

diff --git a/include/tcg/tcg-module-i386.h b/include/tcg/tcg-module-i386.h
index aa96aca82c4a..02a9716e2e66 100644
--- a/include/tcg/tcg-module-i386.h
+++ b/include/tcg/tcg-module-i386.h
@@ -7,6 +7,7 @@ struct TCGI386ModuleOps {
     void (*update_mxcsr_from_sse_status)(CPUX86State *env);
     void (*x86_register_ferr_irq)(qemu_irq irq);
     void (*cpu_set_ignne)(void);
+    void (*cpu_x86_update_dr7)(CPUX86State *env, uint32_t new_dr7);
 };
 extern struct TCGI386ModuleOps tcg_i386;
 
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 6b9b1fad016f..0f3922939eb6 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1995,7 +1995,6 @@ void x86_stq_phys(CPUState *cs, hwaddr addr, uint64_t 
val);
 void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
 void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
 void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
-void cpu_x86_update_dr7(CPUX86State *env, uint32_t new_dr7);
 
 /* hw/pc.c */
 uint64_t cpu_get_tsc(CPUX86State *env);
diff --git a/accel/tcg/tcg-module-i386.c b/accel/tcg/tcg-module-i386.c
index 307238e3bc78..1025943c8b21 100644
--- a/accel/tcg/tcg-module-i386.c
+++ b/accel/tcg/tcg-module-i386.c
@@ -13,10 +13,15 @@ static void x86_register_ferr_irq_stub(qemu_irq irq)
 {
 }
 
+static void cpu_x86_update_dr7_stub(CPUX86State *env, uint32_t new_dr7)
+{
+}
+
 struct TCGI386ModuleOps tcg_i386 = {
     .update_fp_status = i386_update_cpu_stub,
     .update_mxcsr_status = i386_update_cpu_stub,
     .update_mxcsr_from_sse_status = i386_update_cpu_stub,
     .x86_register_ferr_irq = x86_register_ferr_irq_stub,
     .cpu_set_ignne = i386_update_stub,
+    .cpu_x86_update_dr7 = cpu_x86_update_dr7_stub,
 };
diff --git a/target/i386/machine.c b/target/i386/machine.c
index dc63de37dd6f..44736cb036c0 100644
--- a/target/i386/machine.c
+++ b/target/i386/machine.c
@@ -381,7 +381,7 @@ static int cpu_post_load(void *opaque, int version_id)
            let the helper re-enable them.  */
         dr7 = env->dr[7];
         env->dr[7] = dr7 & ~(DR7_GLOBAL_BP_MASK | DR7_LOCAL_BP_MASK);
-        cpu_x86_update_dr7(env, dr7);
+        tcg_i386.cpu_x86_update_dr7(env, dr7);
     }
     tcg.tlb_flush(cs);
     return 0;
diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c
index 3ed20ca31d75..f39d5be97b94 100644
--- a/target/i386/tcg/seg_helper.c
+++ b/target/i386/tcg/seg_helper.c
@@ -460,7 +460,7 @@ static void switch_tss_ra(CPUX86State *env, int 
tss_selector,
 #ifndef CONFIG_USER_ONLY
     /* reset local breakpoints */
     if (env->dr[7] & DR7_LOCAL_BP_MASK) {
-        cpu_x86_update_dr7(env, env->dr[7] & ~DR7_LOCAL_BP_MASK);
+        tcg_i386.cpu_x86_update_dr7(env, env->dr[7] & ~DR7_LOCAL_BP_MASK);
     }
 #endif
 }
diff --git a/target/i386/tcg/sysemu/bpt_helper.c 
b/target/i386/tcg/sysemu/bpt_helper.c
index 4d96a48a3ca3..b90c5e267ddf 100644
--- a/target/i386/tcg/sysemu/bpt_helper.c
+++ b/target/i386/tcg/sysemu/bpt_helper.c
@@ -121,7 +121,7 @@ static void hw_breakpoint_remove(CPUX86State *env, int 
index)
     }
 }
 
-void cpu_x86_update_dr7(CPUX86State *env, uint32_t new_dr7)
+static void cpu_x86_update_dr7(CPUX86State *env, uint32_t new_dr7)
 {
     target_ulong old_dr7 = env->dr[7];
     int iobpt = 0;
@@ -296,3 +296,10 @@ void helper_bpt_io(CPUX86State *env, uint32_t port,
         raise_exception(env, EXCP01_DB);
     }
 }
+
+static void tcgi386_module_ops_bpt_sys(void)
+{
+    tcg_i386.cpu_x86_update_dr7 = cpu_x86_update_dr7;
+}
+
+type_init(tcgi386_module_ops_bpt_sys);
-- 
2.31.1