Hi, Richard.
On 07/23/2021 02:38 PM, Richard Henderson wrote:
> On 7/20/21 11:53 PM, Song Gao wrote:
>> +/* Branch Instructions translation */
>> +static bool trans_beqz(DisasContext *ctx, arg_beqz *a)
>> +{
>> + TCGv t0, t1;
>> + int bcond_flag = 0;
>> +
>> + t0 = tcg_temp_new();
>> + t1 = tcg_const_i64(0);
>> +
>> + if (a->rj != 0) {
>> + gen_load_gpr(t0, a->rj);
>> + bcond_flag = 1;
>> + }
>> +
>> + if (bcond_flag == 0) {
>> + ctx->hflags |= LOONGARCH_HFLAG_B;
>> + } else {
>> + tcg_gen_setcond_tl(TCG_COND_EQ, bcond, t0, t1);
>> + ctx->hflags |= LOONGARCH_HFLAG_BC;
>> + }
>> + ctx->btarget = ctx->base.pc_next + (a->offs21 << 2);
>> +
>> + tcg_temp_free(t0);
>> + tcg_temp_free(t1);
>> +
>> + return true;
>> +}
>
> Drop all of the branch delay slot stuff.
> Use a common routine and pass in the TCGCond.
>
OK>
> r~
Thanks
Song Gao.
