On 7/21/21 11:53 AM, Song Gao wrote:
> This patch implement fixed point arithemtic instruction translation.
>
> This includes:
> - ADD.{W/D}, SUB.{W/D}
> - ADDI.{W/D}, ADDU16ID
> - ALSL.{W[U]/D}
> - LU12I.W, LU32I.D LU52I.D
> - SLT[U], SLT[U]I
> - PCADDI, PCADDU12I, PCADDU18I, PCALAU12I
> - AND, OR, NOR, XOR, ANDN, ORN
> - MUL.{W/D}, MULH.{W[U]/D[U]}
> - MULW.D.W[U]
> - DIV.{W[U]/D[U]}, MOD.{W[U]/D[U]}
> - ANDI, ORI, XORI
>
> Signed-off-by: Song Gao <gaos...@loongson.cn>
> ---
> target/loongarch/insns.decode | 89 ++++
> target/loongarch/trans.inc.c | 1090
> +++++++++++++++++++++++++++++++++++++++++
> target/loongarch/translate.c | 12 +
> target/loongarch/translate.h | 1 +
> 4 files changed, 1192 insertions(+)
> create mode 100644 target/loongarch/insns.decode
> create mode 100644 target/loongarch/trans.inc.c
Please don't include all .inc.c in one big translate.c...
> diff --git a/target/loongarch/translate.c b/target/loongarch/translate.c
> index 531f7e1..b60bdc2 100644
> --- a/target/loongarch/translate.c
> +++ b/target/loongarch/translate.c
> @@ -57,6 +57,15 @@ void gen_load_gpr(TCGv t, int reg)
> }
> }
>
> +TCGv get_gpr(int regno)
> +{
> + if (regno == 0) {
> + return tcg_constant_tl(0);
> + } else {
> + return cpu_gpr[regno];
> + }
> +}
> +
> static inline void gen_save_pc(target_ulong pc)
... expose this one ...
> {
> tcg_gen_movi_tl(cpu_PC, pc);
> @@ -287,6 +296,9 @@ static bool
> loongarch_tr_breakpoint_check(DisasContextBase *dcbase,
> return true;
> }
>
> +#include "decode-insns.c.inc"
... and move this include to "trans.c".
> +#include "trans.inc.c"
removing this include.
> static void loongarch_tr_translate_insn(DisasContextBase *dcbase, CPUState
> *cs)
> {
> CPULoongArchState *env = cs->env_ptr;
> diff --git a/target/loongarch/translate.h b/target/loongarch/translate.h
> index 333c3bf..ef4d4e7 100644
> --- a/target/loongarch/translate.h
> +++ b/target/loongarch/translate.h
> @@ -35,6 +35,7 @@ void check_fpu_enabled(DisasContext *ctx);
>
> void gen_base_offset_addr(TCGv addr, int base, int offset);
> void gen_load_gpr(TCGv t, int reg);
> +TCGv get_gpr(int regno);
> void gen_load_fpr32(TCGv_i32 t, int reg);
> void gen_load_fpr64(TCGv_i64 t, int reg);
> void gen_store_fpr32(TCGv_i32 t, int reg);
>
