Per the "MIPS® DSP Module for MIPS64 Architecture" manual, rev. 3.02,
Table 5.3 "SPECIAL3 Encoding of Function Field for DSP Module":
If the Module/ASE is not implemented, executing such an instruction
must cause a Reserved Instruction Exception.
The DINSV instruction lists the following exceptions:
- Reserved Instruction
- DSP Disabled
If the MIPS core doesn't support the DSP module, or the DSP is
disabled, do not handle the '$rt = $0' case as a no-op but raise
the proper exception instead.
Cc: Jia Liu <pro...@gmail.com>
Fixes: 1cb6686cf92 ("target-mips: Add ASE DSP bit/manipulation instructions")
Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Message-Id: <20210529165443.1114402-1-f4...@amsat.org>
---
target/mips/tcg/translate.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index 09b19262c8c..3fd0c48d772 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -24379,10 +24379,11 @@ static void decode_opc_special3_legacy(CPUMIPSState
*env, DisasContext *ctx)
{
TCGv t0, t1;
+ check_dsp(ctx);
+
if (rt == 0) {
break;
}
- check_dsp(ctx);
t0 = tcg_temp_new();
t1 = tcg_temp_new();
--
2.31.1
