On Mon, May 17, 2021 at 5:09 PM Philippe Mathieu-Daudé <f4...@amsat.org> wrote:
>
> The RISCV CPU is migratable since commit f7697f0e629
> ("target/riscv: Add basic vmstate description of CPU"),
> so remove an obsolete comment which is now incorrect.
>
> Reported-by: Richard Henderson <richard.hender...@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org>Thanks! Applied to riscv-to-apply.next Alistair > --- > target/riscv/cpu.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index 3191fd00822..d459e8427e2 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -638,7 +638,6 @@ static void riscv_cpu_class_init(ObjectClass *c, void > *data) > cc->disas_set_info = riscv_cpu_disas_set_info; > #ifndef CONFIG_USER_ONLY > cc->get_phys_page_debug = riscv_cpu_get_phys_page_debug; > - /* For now, mark unmigratable: */ > cc->vmsd = &vmstate_riscv_cpu; > cc->write_elf64_note = riscv_cpu_write_elf64_note; > cc->write_elf32_note = riscv_cpu_write_elf32_note; > -- > 2.26.3 > >
