On 5/17/21 2:08 AM, Philippe Mathieu-Daudé wrote:
The RISCV CPU is migratable since commit f7697f0e629 ("target/riscv: Add basic vmstate description of CPU"), so remove an obsolete comment which is now incorrect.Reported-by: Richard Henderson<richard.hender...@linaro.org> Signed-off-by: Philippe Mathieu-Daudé<f4...@amsat.org> --- target/riscv/cpu.c | 1 - 1 file changed, 1 deletion(-)
Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~
