riscv: Use the RISCVException enum for CSR operations

Bin Meng Tue, 06 Apr 2021 01:41:42 -0700

On Thu, Apr 1, 2021 at 11:20 PM Alistair Francis
<[email protected]> wrote:
>
> Signed-off-by: Alistair Francis <[email protected]>
> ---
>  target/riscv/cpu.h |  14 +-
>  target/riscv/csr.c | 643 +++++++++++++++++++++++++++------------------
>  2 files changed, 390 insertions(+), 267 deletions(-)
>


Reviewed-by: Bin Meng <[email protected]>

Re: [PATCH v2 4/5] target/riscv: Use the RISCVException enum for CSR operations

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