On 09/14/2011 09:10 PM, Jan Kiszka wrote:
OK, let's try again: Do we have to model hierarchy in PIO address space at all? I don't think so.
We do. A device listens to addresses 0x100-0x110. Another BAR (at 0x106) clips this to 0x100-0x106. The pci/pci bridge clips this to 0x105-0x106. The host pci bridge remaps this as 0x1000000105-0x1000000106 in the memory address space space. But someone configured a cpu-local region at this address, so the cpu can't reach it at all.
-- I have a truly marvellous patch that fixes the bug which this signature is too narrow to contain.
