On Thu, 7 Jan 2021 at 22:02, Richard Henderson
<richard.hender...@linaro.org> wrote:
>
> On 1/7/21 7:39 AM, Peter Maydell wrote:
> >> + if (align > MO_ALIGN_8) {
> >> + t0 = tcg_temp_new_i64();
> >> + tcg_gen_qemu_ld_i64(t0, clean_addr, midx, MO_LEQ | align);
> >> + tcg_gen_addi_i64(clean_addr, clean_addr, 8);
> >> + tcg_gen_addi_ptr(i, i, 8);
> >> + tcg_gen_st_i64(t0, cpu_env, vofs);
> >> + tcg_temp_free_i64(t0);
> >> + align = 0;
> >> + }
> >> +
> >
> > Why do we need to do this (and the similar thing in do_str()) ?
> > Most of the rest of the patch is fairly clear in that it is just
> > passing the alignment requirement through to the load/store fns,
> > but this is a bit more opaque to me...
>
> What follows this context is a single memory access within a tcg loop.
>
> When align is <= the size of the access, every access can use the same
> alignment mop. But for MO_ALIGN_16, since we're emitting 8-byte accesses, the
> second access will not be 16-byte aligned. So I peel off one loop iteration
> at
> the beginning to perform the alignment check.
OK. Could you add comments to that effect, please?
Otherwise
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
thanks
-- PMM
