Hi Huacai, On 12/21/20 12:05 PM, Huacai Chen wrote: > Add Loongson-3 based machine support, it use liointc as the interrupt > controler and use GPEX as the pci controller. Currently it can work with > both TCG and KVM. > > As the machine model is not based on any exiting physical hardware, the > name of the machine is "loongson3-virt". It may be superseded in future > by a real machine model. If this happens, then a regular deprecation > procedure shall occur for "loongson3-virt" machine. > > We now already have a full functional Linux kernel (based on Linux-5.4.x > LTS) here: > > https://github.com/chenhuacai/linux
Can you point to a tag/commit? (Thinking about looking at this commit in few years from now). > Of course the upstream kernel is also usable (the kvm host side and > guest side have both been upstream in Linux-5.9): > > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git > > How to use QEMU/Loongson-3? > 1, Download kernel source from the above URL; > 2, Build a kernel with arch/mips/configs/loongson3_defconfig; > 3, Boot a Loongson-3A4000 host with this kernel (for KVM mode); > 4, Build QEMU-master with this patchset; > 5, modprobe kvm (only necessary for KVM mode); > 6, Use QEMU with TCG: > qemu-system-mips64el -M loongson3-virt,accel=tcg -cpu Loongson-3A1000 > -kernel <path_to_kernel> -append ... > Use QEMU with KVM: > qemu-system-mips64el -M loongson3-virt,accel=kvm -cpu Loongson-3A4000 > -kernel <path_to_kernel> -append ... > > The "-cpu" parameter is optional here and QEMU will use the correct type > for TCG/KVM automatically. > > Signed-off-by: Huacai Chen <chenhua...@kernel.org> > Co-developed-by: Jiaxun Yang <jiaxun.y...@flygoat.com> > Signed-off-by: Jiaxun Yang <jiaxun.y...@flygoat.com> > --- > MAINTAINERS | 1 + > default-configs/devices/mips64el-softmmu.mak | 1 + > hw/mips/Kconfig | 11 + > hw/mips/loongson3_virt.c | 621 +++++++++++++++++++ > hw/mips/meson.build | 2 +- > 5 files changed, 635 insertions(+), 1 deletion(-) > create mode 100644 hw/mips/loongson3_virt.c ... > + /* > + * The whole MMIO range among configure registers doesn't generate > + * exception when accessing invalid memory. Create some unimplememted > + * devices to emulate this feature. > + */ > + create_unimplemented_device("mmio fallback 0", 0x10000000, 256 * MiB); > + create_unimplemented_device("mmio fallback 1", 0x30000000, 256 * MiB); > + > + liointc = qdev_new("loongson.liointc"); > + sysbus_realize_and_unref(SYS_BUS_DEVICE(liointc), &error_fatal); > + > + sysbus_mmio_map(SYS_BUS_DEVICE(liointc), 0, > virt_memmap[VIRT_LIOINTC].base); > + > + serial_mm_init(address_space_mem, virt_memmap[VIRT_UART].base, 0, > + qdev_get_gpio_in(liointc, UART_IRQ), 115200, serial_hd(0), > + DEVICE_NATIVE_ENDIAN); > + > + sysbus_create_simple("goldfish_rtc", virt_memmap[VIRT_RTC].base, > + qdev_get_gpio_in(liointc, RTC_IRQ)); > + > + cpuclk = clock_new(OBJECT(machine), "cpu-refclk"); > + clock_set_hz(cpuclk, DEF_LOONGSON3_FREQ); Shouldn't this be: clock_set_hz(cpuclk, get_cpu_freq_hz()); ? > + > + for (i = 0; i < machine->smp.cpus; i++) { > + int ip; > + > + /* init CPUs */ > + cpu = mips_cpu_create_with_clock(machine->cpu_type, cpuclk); > + > + /* Init internal devices */ > + cpu_mips_irq_init_cpu(cpu); > + cpu_mips_clock_init(cpu); > + qemu_register_reset(main_cpu_reset, cpu); > + > + if (i >= 4) { > + continue; /* Only node-0 can be connected to LIOINTC */ > + } > + > + for (ip = 0; ip < 4 ; ip++) { > + int pin = i * 4 + ip; > + sysbus_connect_irq(SYS_BUS_DEVICE(liointc), > + pin, cpu->env.irq[ip + 2]); > + } > + } > + env = &MIPS_CPU(first_cpu)->env; ...
