On Wed, Dec 9, 2020 at 8:03 AM Richard Henderson
<richard.hender...@linaro.org> wrote:
>
> On 12/8/20 4:56 PM, Alistair Francis wrote:
> > +#ifdef TARGET_RISCV64
> > +static void rv64_sifive_u_cpu_init(Object *obj)
> > {
> > CPURISCVState *env = &RISCV_CPU(obj)->env;
> > - set_misa(env, RVXLEN | RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU);
> > + set_misa(env, RV64 | RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU);
> > set_priv_version(env, PRIV_VERSION_1_10_0);
> > }
> >
> > -static void rvxx_sifive_e_cpu_init(Object *obj)
> > +static void rv64_sifive_e_cpu_init(Object *obj)
> > {
> > CPURISCVState *env = &RISCV_CPU(obj)->env;
> > - set_misa(env, RVXLEN | RVI | RVM | RVA | RVC | RVU);
> > + set_misa(env, RV64 | RVI | RVM | RVA | RVC | RVU);
> > set_priv_version(env, PRIV_VERSION_1_10_0);
> > qdev_prop_set_bit(DEVICE(obj), "mmu", false);
> > }
> > +#else
>
> I guess it isn't much duplication, but you could retain the rvxx functions and
> pass in xlen as an argument. Either way,
Good idea, this file still needs more work in the future. So I'll do
that when fixing it up.
>
> Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Thanks.
Alistair
>
> r~
