Changelog: v3 -> v4 - 1/4: Patch changed to change names of register fields to be more accurate. - 1/4: Revert polarity change from v3. - 2/4: Added, fixes polarity of VCFG XIP mode when copied from NVCFG. - 3/4: Removed check_cmd_mode function, each command check is done in decode_new_cmd instead. - 3/4: Add guest error print if JEDEC read is executed in QIO or DIO mode. - 3/4: Don't check PP and PP4, they work regardless of mode. PP4_4 is left as is. - 3/4: Simplify get_mode function. - 4/4: Simplify extract_cfg_num_dummies function. - 4/4: Use switch statement instead of table for cycle retrieving.
v2 -> v3 - 1/3: Added, Fixes NVCFG polarity for DIO/QIO. - 2/3: Added, Checks if we can execute the current command in standard/DIO/QIO mode. - 3/3: Was 1/1 in v2. Added cycle counts for DIO/QIO mode. v1 -> v2 - 1/2: Change function name to be more accurate - 2/2: Dropped Hi all, The series fixes the behavior of the dummy cycle register for Numonyx flashes so it's closer to how hardware behaves. It also checks if a command can be executed in the current SPI mode (standard, DIO, or QIO) before extracting dummy cycles for the command. On hardware, the dummy cycles for fast read commands are set to a specific value (8 or 10) if the register is all 0s or 1s. If the register value isn't all 0s or 1s, then the flash expects the amount of cycles sent to be equal to the count in the register. Thanks! Joe Joe Komlodi (4): hw/block/m25p80: Make Numonyx config field names more accurate hw/block/m25p80: Fix when VCFG XIP bit is set for Numonyx hw/block/m25p80: Check SPI mode before running some Numonyx commands hw/block/m25p80: Fix Numonyx fast read dummy cycle count hw/block/m25p80.c | 185 +++++++++++++++++++++++++++++++++++++++++++----------- 1 file changed, 148 insertions(+), 37 deletions(-) -- 2.7.4
