The following changes since commit 3c8c36c9087da957f580a9bb5ebf7814a753d1c6:
Merge remote-tracking branch 'remotes/kraxel/tags/ui-20201104-pull-request'
into staging (2020-11-04 16:52:17 +0000)
are available in the Git repository at:
g...@github.com:alistair23/qemu.git tags/pull-riscv-to-apply-20201109
for you to fetch changes up to 96338fefc19a143abdc91f6c44f37683274b08d4:
hw/intc/ibex_plic: Clear the claim register when read (2020-11-09 15:09:53
-0800)
----------------------------------------------------------------
This fixes two bugs in the RISC-V port. One is a bug in the
Ibex PLIC, the other fixes the Hypvervisor access functions.
----------------------------------------------------------------
Alistair Francis (6):
target/riscv: Add a virtualised MMU Mode
target/riscv: Set the virtualised MMU mode when doing hyp accesses
target/riscv: Remove the HS_TWO_STAGE flag
target/riscv: Remove the hyp load and store functions
target/riscv: Split the Hypervisor execute load helpers
hw/intc/ibex_plic: Clear the claim register when read
target/riscv/cpu-param.h | 11 ++-
target/riscv/cpu.h | 19 ++++-
target/riscv/cpu_bits.h | 1 -
target/riscv/helper.h | 5 +-
hw/intc/ibex_plic.c | 3 +
target/riscv/cpu_helper.c | 62 ++++++--------
target/riscv/op_helper.c | 124 ++-------------------------
target/riscv/translate.c | 2 +
target/riscv/insn_trans/trans_rvh.c.inc | 143 ++++++++++++--------------------
9 files changed, 115 insertions(+), 255 deletions(-)
