On Mon, Aug 24, 2020 at 2:33 PM Peter Maydell <peter.mayd...@linaro.org> wrote: > On Sat, 22 Aug 2020 at 20:48, Max Filippov <jcmvb...@gmail.com> wrote: > > On Sat, Aug 22, 2020 at 3:20 AM Philippe Mathieu-Daudé <f4...@amsat.org> > > wrote: > > > > > > Where does that come from? > > > > Generated by xtensa processor generator, as one of many output artifacts. > > Is there anything different with the source for these cores > compared to the ones we already have in the tree, or are > these just "more cores, generated the same way as the old ones" ?
They are generated the same way as the old ones, but they have different configurations: they support FPU2000 and DFPU opcodes implemented earlier in this series. I've added them to enable testing of these opcodes. de233_fpu is supposed to be a platform for further xtensa gcc development. -- Thanks. -- Max
