Add a config option to enable experimental support for ePMP. This is disabled by default and can be enabled with 'x-epmp=true'.
Signed-off-by: Hongzheng-Li <ethan.lee....@gmail.com> Signed-off-by: Hou Weiying <weiying_...@outlook.com> Signed-off-by: Myriad-Dreamin <camiy...@gmail.com> --- target/riscv/cpu.c | 9 +++++++++ target/riscv/cpu.h | 3 +++ 2 files changed, 12 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 228b9bdb5d..d691d6ffd6 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -371,6 +371,14 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) if (cpu->cfg.pmp) { set_feature(env, RISCV_FEATURE_PMP); + + /* + * Enhanced PMP should only be available + * on harts with PMP support + */ + if (cpu->cfg.epmp) { + set_feature(env, RISCV_FEATURE_EPMP); + } } /* If misa isn't set (rv32 and rv64 machines) set it here */ @@ -518,6 +526,7 @@ static Property riscv_cpu_properties[] = { DEFINE_PROP_UINT16("elen", RISCVCPU, cfg.elen, 64), DEFINE_PROP_BOOL("mmu", RISCVCPU, cfg.mmu, true), DEFINE_PROP_BOOL("pmp", RISCVCPU, cfg.pmp, true), + DEFINE_PROP_BOOL("x-epmp", RISCVCPU, cfg.epmp, false), DEFINE_PROP_END_OF_LIST(), }; diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index a804a5d0ba..9a813f3f1c 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -73,6 +73,7 @@ enum { RISCV_FEATURE_MMU, RISCV_FEATURE_PMP, + RISCV_FEATURE_EPMP, RISCV_FEATURE_MISA }; @@ -217,6 +218,7 @@ struct CPURISCVState { /* physical memory protection */ pmp_table_t pmp_state; + target_ulong mseccfg; /* machine specific rdtime callback */ uint64_t (*rdtime_fn)(void); @@ -291,6 +293,7 @@ typedef struct RISCVCPU { uint16_t elen; bool mmu; bool pmp; + bool epmp; } cfg; } RISCVCPU; -- 2.20.1