On Tue, Jun 23, 2020 at 4:25 PM Vikram Garhwal <fnu.vik...@xilinx.com> wrote:
>
> Connect CAN0 and CAN1 on the ZynqMP.
>
> Signed-off-by: Vikram Garhwal <fnu.vik...@xilinx.com>
Acked-by: Alistair Francis <alistair.fran...@wdc.com>
Alistair
> ---
> hw/arm/xlnx-zynqmp.c | 28 ++++++++++++++++++++++++++++
> include/hw/arm/xlnx-zynqmp.h | 4 ++++
> 2 files changed, 32 insertions(+)
>
> diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
> index 1de9d4a..3f93524 100644
> --- a/hw/arm/xlnx-zynqmp.c
> +++ b/hw/arm/xlnx-zynqmp.c
> @@ -81,6 +81,14 @@ static const int uart_intr[XLNX_ZYNQMP_NUM_UARTS] = {
> 21, 22,
> };
>
> +static const uint64_t can_addr[XLNX_ZYNQMP_NUM_CAN] = {
> + 0xFF060000, 0xFF070000,
> +};
> +
> +static const int can_intr[XLNX_ZYNQMP_NUM_CAN] = {
> + 23, 24,
> +};
> +
> static const uint64_t sdhci_addr[XLNX_ZYNQMP_NUM_SDHCI] = {
> 0xFF160000, 0xFF170000,
> };
> @@ -247,6 +255,11 @@ static void xlnx_zynqmp_init(Object *obj)
> TYPE_CADENCE_UART);
> }
>
> + for (i = 0; i < XLNX_ZYNQMP_NUM_CAN; i++) {
> + object_initialize_child(obj, "can[*]", &s->can[i],
> + TYPE_XLNX_ZYNQMP_CAN);
> + }
> +
> object_initialize_child(obj, "sata", &s->sata, TYPE_SYSBUS_AHCI);
>
> for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) {
> @@ -492,6 +505,21 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error
> **errp)
> gic_spi[uart_intr[i]]);
> }
>
> + for (i = 0; i < XLNX_ZYNQMP_NUM_CAN; i++) {
> + object_property_set_int(OBJECT(&s->can[i]), i, "ctrl-idx",
> + &error_abort);
> + object_property_set_int(OBJECT(&s->can[i]), XLNX_ZYNQMP_CAN_REF_CLK,
> + "ext_clk_freq", &error_abort);
> + sysbus_realize(SYS_BUS_DEVICE(&s->can[i]), &err);
> + if (err) {
> + error_propagate(errp, err);
> + return;
> + }
> + sysbus_mmio_map(SYS_BUS_DEVICE(&s->can[i]), 0, can_addr[i]);
> + sysbus_connect_irq(SYS_BUS_DEVICE(&s->can[i]), 0,
> + gic_spi[can_intr[i]]);
> + }
> +
> object_property_set_int(OBJECT(&s->sata), SATA_NUM_PORTS, "num-ports",
> &error_abort);
> sysbus_realize(SYS_BUS_DEVICE(&s->sata), &err);
> diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
> index 53076fa..dcb88e0 100644
> --- a/include/hw/arm/xlnx-zynqmp.h
> +++ b/include/hw/arm/xlnx-zynqmp.h
> @@ -22,6 +22,7 @@
> #include "hw/intc/arm_gic.h"
> #include "hw/net/cadence_gem.h"
> #include "hw/char/cadence_uart.h"
> +#include "hw/net/xlnx-zynqmp-can.h"
> #include "hw/ide/ahci.h"
> #include "hw/sd/sdhci.h"
> #include "hw/ssi/xilinx_spips.h"
> @@ -41,6 +42,8 @@
> #define XLNX_ZYNQMP_NUM_RPU_CPUS 2
> #define XLNX_ZYNQMP_NUM_GEMS 4
> #define XLNX_ZYNQMP_NUM_UARTS 2
> +#define XLNX_ZYNQMP_NUM_CAN 2
> +#define XLNX_ZYNQMP_CAN_REF_CLK (24 * 1000 * 1000)
> #define XLNX_ZYNQMP_NUM_SDHCI 2
> #define XLNX_ZYNQMP_NUM_SPIS 2
> #define XLNX_ZYNQMP_NUM_GDMA_CH 8
> @@ -92,6 +95,7 @@ typedef struct XlnxZynqMPState {
>
> CadenceGEMState gem[XLNX_ZYNQMP_NUM_GEMS];
> CadenceUARTState uart[XLNX_ZYNQMP_NUM_UARTS];
> + XlnxZynqMPCANState can[XLNX_ZYNQMP_NUM_CAN];
> SysbusAHCIState sata;
> SDHCIState sdhci[XLNX_ZYNQMP_NUM_SDHCI];
> XilinxSPIPS spi[XLNX_ZYNQMP_NUM_SPIS];
> --
> 2.7.4
>
>
