On Sat, 30 May 2020 at 00:07, Adam Lackorzynski <a...@l4re.org> wrote: > > Initialize the CPU interface registers also > for Cortex-A15 and Cortex-A7 CPU models, in > the same way as done for 64bit CPU models. > This fixes usage of GICv3 in virtualization > contexts in 32bit configurations. > > Signed-off-by: Adam Lackorzynski <a...@l4re.org>
Hi; I'm confused by this patch. The Cortex-A15 and Cortex-A7 do not have or support the GICv3, so why would we need to set GICv3-specific settings for them? We're probably missing a sanity-check somewhere to forbid user attempts to use non-GICv3 CPUs with the GICv3. thanks -- PMM
