On Fri, May 22, 2020 at 4:52 AM Eden Mikitas <e.miki...@gmail.com> wrote:
>
> When inserting the value retrieved (rx) from the spi slave, rx is pushed to
> rx_fifo after being cast to uint8_t. rx_fifo is a fifo32, and the rx
> register the driver uses is also 32 bit. This zeroes the 24 most
> significant bits of rx. This proved problematic with devices that expect to
> use the whole 32 bits of the rx register.
>
> Signed-off-by: Eden Mikitas <e.miki...@gmail.com>
Reviewed-by: Alistair Francis <alistair.fran...@wdc.com>
Alistair
> ---
> hw/ssi/imx_spi.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c
> index 6fef5c7958..43b2f14dd2 100644
> --- a/hw/ssi/imx_spi.c
> +++ b/hw/ssi/imx_spi.c
> @@ -206,7 +206,7 @@ static void imx_spi_flush_txfifo(IMXSPIState *s)
> if (fifo32_is_full(&s->rx_fifo)) {
> s->regs[ECSPI_STATREG] |= ECSPI_STATREG_RO;
> } else {
> - fifo32_push(&s->rx_fifo, (uint8_t)rx);
> + fifo32_push(&s->rx_fifo, rx);
> }
>
> if (s->burst_length <= 0) {
> --
> 2.17.1
>
>
