This patchset converts the Neon insns in the 2-register-and-shift-amount
and 1-register-and-modified-immediate groups to decodetree.
Changes since v1:
* old patch 1 is now in master
* patch 1, 2, 3, 4: create and use separate formats for each size of shift
* patch 5, 6, 7: use new @2reg_shrn_[dsh] formats and keep Q bit in the
per-insn decode rather than folding it into the format
* patch 8: use %neon_rshift_i5 in new @2reg_vcvt format
* patch 9: various changes
Patches still needing review: 1, 5, 9. (RTH: you might want to look over
2 as well: I didn't use quite the same shift formats you suggested.)
thanks
-- PMM
Peter Maydell (9):
target/arm: Convert Neon VSHL and VSLI 2-reg-shift insn to decodetree
target/arm: Convert Neon VSHR 2-reg-shift insns to decodetree
target/arm: Convert Neon VSRA, VSRI, VRSHR, VRSRA 2-reg-shift insns to
decodetree
target/arm: Convert VQSHLU, VQSHL 2-reg-shift insns to decodetree
target/arm: Convert Neon narrowing shifts with op==8 to decodetree
target/arm: Convert Neon narrowing shifts with op==9 to decodetree
target/arm: Convert Neon VSHLL, VMOVL to decodetree
target/arm: Convert VCVT fixed-point ops to decodetree
target/arm: Convert Neon one-register-and-immediate insns to
decodetree
target/arm/neon-dp.decode | 196 ++++++++++
target/arm/translate-neon.inc.c | 625 ++++++++++++++++++++++++++++++++
target/arm/translate.c | 488 +------------------------
3 files changed, 823 insertions(+), 486 deletions(-)
--
2.20.1
