On Mon, May 04, 2020 at 07:36:05PM +0530, Sai Pavan Boddu wrote: > Advertise support of clear-on-read for ISR registers.
Reviewed-by: Edgar E. Iglesias <edgar.igles...@xilinx.com> > > Signed-off-by: Sai Pavan Boddu <sai.pavan.bo...@xilinx.com> > --- > hw/net/cadence_gem.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c > index 848be3f..9eb72a2 100644 > --- a/hw/net/cadence_gem.c > +++ b/hw/net/cadence_gem.c > @@ -1344,7 +1344,7 @@ static void gem_reset(DeviceState *d) > s->regs[GEM_TXPARTIALSF] = 0x000003ff; > s->regs[GEM_RXPARTIALSF] = 0x000003ff; > s->regs[GEM_MODID] = s->revision; > - s->regs[GEM_DESCONF] = 0x02500111; > + s->regs[GEM_DESCONF] = 0x02D00111; > s->regs[GEM_DESCONF2] = 0x2ab12800; > s->regs[GEM_DESCONF5] = 0x002f2045; > s->regs[GEM_DESCONF6] = GEM_DESCONF6_64B_MASK; > -- > 2.7.4 >
