This series is inspired of Peter Maydell fix [1]:
"hw/arm/xlnx-zynqmp.c: fix some error-handling code",
but grew after v1 [2] review :/
Markus: I added the cocci patches to your Error section, I hope
that's fine :)
Part 1: Simplify error propagation by moving some code from
DeviceClass::realize() to DeviceClass:initfn().
Regards,
Phil.
[1] https://www.mail-archive.com/qemu-devel@nongnu.org/msg691636.html
[2] https://www.mail-archive.com/qemu-devel@nongnu.org/msg692155.html
Supersedes: <20200406174743.16956-1-f4...@amsat.org>
Philippe Mathieu-Daud=C3=A9 (24):
various: Remove suspicious '\' character outside of #define in C code
scripts/coccinelle: Script to simplify DeviceClass error propagation
hw/arm/allwinner-a10: Move some code from realize() to init()
hw/arm/aspeed_ast2600: Simplify use of Error*
hw/arm/aspeed_ast2600: Move some code from realize() to init()
hw/arm/aspeed_soc: Move some code from realize() to init()
hw/arm/aspeed_soc: Simplify use of Error*
hw/arm/fsl-imx6: Simplify checks on 'smp_cpus' count
hw/arm/fsl-imx6: Move some code from realize() to init()
hw/arm/fsl-imx31: Move some code from realize() to init()
hw/arm/msf2-soc: Store MemoryRegion in MSF2State
hw/arm/stm32f205_soc: Store MemoryRegion in STM32F205State
hw/arm/stm32f205_soc: Move some code from realize() to init()
hw/arm/xlnx-zynqmp: Use single propagate_error() call
hw/arm/xlnx-zynqmp: Split xlnx_zynqmp_create_rpu() as init + realize
hw/arm/xlnx-zynqmp: Move some code from realize() to init()
hw/microblaze/xlnx-zynqmp-pmu: Move some code from realize() to init()
hw/pci-host/pnv_phb3: Move some code from realize() to init()
hw/riscv/sifive_e: Move some code from realize() to init()
hw/riscv/sifive_u: Use single type_init()
hw/riscv/sifive_u: Move some code from realize() to init()
hw/riscv/sifive_u: Store MemoryRegion in SiFiveUSoCState
hw/riscv/sifive_u: Move some code from realize() to init()
hw/riscv/sifive_u: Rename MachineClass::init()
...implify-init-realize-error_propagate.cocci | 69 ++++++++++
include/hw/arm/msf2-soc.h | 4 +
include/hw/arm/stm32f205_soc.h | 4 +
include/hw/riscv/sifive_u.h | 2 +
block/replication.c | 4 +-
block/vhdx.c | 8 +-
dump/dump.c | 2 +-
hw/arm/allwinner-a10.c | 26 ++--
hw/arm/aspeed_ast2600.c | 61 +++++----
hw/arm/aspeed_soc.c | 19 +--
hw/arm/fsl-imx31.c | 4 +-
hw/arm/fsl-imx6.c | 55 ++++----
hw/arm/msf2-soc.c | 18 +--
hw/arm/stm32f205_soc.c | 28 ++--
hw/arm/xlnx-zynqmp.c | 126 +++++++++---------
hw/microblaze/xlnx-zynqmp-pmu.c | 46 +++----
hw/net/virtio-net.c | 2 +-
hw/pci-host/pnv_phb3.c | 8 +-
hw/riscv/sifive_e.c | 26 ++--
hw/riscv/sifive_u.c | 66 +++++----
hw/scsi/scsi-disk.c | 2 +-
hw/sd/sdhci.c | 2 +-
target/i386/cpu.c | 18 +--
target/microblaze/cpu.c | 14 +-
target/ppc/translate_init.inc.c | 4 +-
MAINTAINERS | 1 +
26 files changed, 342 insertions(+), 277 deletions(-)
create mode 100644 scripts/coccinelle/simplify-init-realize-error_propagate.=
cocci
--=20
2.21.1
