From: miaoyubo <miaoy...@huawei.com> Changes with v5 v5->v6: stat crs_range_insert in aml_build.h
Changes with v4 v4->v5: Not using specific resources for PXB. Instead, the resources for pxb are composed of the bar space of the pci-bridge/pcie-root-port behined it and the config space of devices behind it. Only if the bios(uefi for arm) support multiple roots, configure space of devices behind pxbs could be obtained. The uefi work is updated for discussion by the following link: https://edk2.groups.io/g/devel/message/56901?p=,,,20,0,0,0::Created,,add+extra+roots+for+Arm,20,2,0,72723351 [PATCH] ArmVirtPkg/FdtPciHostBridgeLib: add extra roots for Arm. Currently pxb-pcie is not supported by arm, the reason for it is pxb-pcie is not described in DSDT table and only one main host bridge is described in acpi tables, which means it is not impossible to present different io numas for different devices. This series of patches make arm to support PXB-PCIE. Users can configure pxb-pcie with certain numa, Example command is: -device pxb-pcie,id=pci.7,bus_nr=128,numa_node=0,bus=pcie.0,addr=0x9 miaoyubo (8): acpi: Extract two APIs from acpi_dsdt_add_pci fw_cfg: Write the extra roots into the fw_cfg acpi: Extract crs build form acpi_build.c acpi: Refactor the source of host bridge and build tables for pxb acpi: Align the size to 128k unit-test: The files changed. unit-test: Add testcase for pxb unit-test: Add the binary file and clear diff.h hw/acpi/aml-build.c | 275 +++++++++++++++++++++++++++++++ hw/arm/virt-acpi-build.c | 251 ++++++++++++++++++++++------- hw/arm/virt.c | 23 +++ hw/i386/acpi-build.c | 285 --------------------------------- include/hw/acpi/aml-build.h | 25 +++ tests/data/acpi/virt/DSDT.pxb | Bin 0 -> 7802 bytes tests/qtest/bios-tables-test.c | 58 ++++++- 7 files changed, 566 insertions(+), 351 deletions(-) create mode 100644 tests/data/acpi/virt/DSDT.pxb -- 2.19.1
