On Tue, Mar 17, 2020 at 03:02:57PM -0500, Eric Blake wrote:
> On 3/17/20 2:59 PM, Peter Xu wrote:
> > Sometimes it would be good to be able to read the pin number along
> > with the IRQ number allocated. Since we'll dump the IRQ number, no
> > reason to not dump the pin information. For example, the vfio-pci
> > device will overwrite the pin with the hardware pin number. It would
> > be nice to know the pin number of one assigned device from QMP/HMP.
> >
> > CC: Dr. David Alan Gilbert <dgilb...@redhat.com>
> > CC: Alex Williamson <alex.william...@redhat.com>
> > CC: Michael S. Tsirkin <m...@redhat.com>
> > CC: Marcel Apfelbaum <marcel.apfelb...@gmail.com>
> > CC: Julia Suvorova <jus...@redhat.com>
> > CC: Markus Armbruster <arm...@redhat.com>
> > Signed-off-by: Peter Xu <pet...@redhat.com>
> > ---
> >
> > This helped me to debug an IRQ sharing issue, so may good to have it
> > in master too.
>
> We're right at soft freeze.
>
>
> > +++ b/qapi/misc.json
> > @@ -403,6 +403,8 @@
> > #
> > # @irq: if an IRQ is assigned to the device, the IRQ number
> > #
> > +# @irq_pin: the IRQ pin, zero means no IRQ (since 5.1)
> > +#
>
> But if we really do want it in 5.0, this needs a tweak. Does the delay
> hurt?
No it won't; it's something good to have only. I'll let the
maintainers to decide...
>
> Naming convention: We prefer 'irq-pin' unless there is a consistency
> issue....
>
> > # @qdev_id: the device name of the PCI device
> > #
> > # @pci_bridge: if the device is a PCI bridge, the bridge information
> > @@ -417,8 +419,8 @@
> > { 'struct': 'PciDeviceInfo',
> > 'data': {'bus': 'int', 'slot': 'int', 'function': 'int',
> > 'class_info': 'PciDeviceClass', 'id': 'PciDeviceId',
> > - '*irq': 'int', 'qdev_id': 'str', '*pci_bridge': 'PciBridgeInfo',
> > - 'regions': ['PciMemoryRegion']} }
> > + '*irq': 'int', 'irq_pin': 'int', 'qdev_id': 'str',
> > + '*pci_bridge': 'PciBridgeInfo', 'regions': ['PciMemoryRegion']
> > }}
>
> and the pre-existing pci_bridge is indeed the consistency issue.
Yeh, actually every key in this struct. :)
Thanks,
--
Peter Xu
