On Mon, Mar 09, 2020 at 09:50:57PM +0100, BALATON Zoltan wrote:
> On Mon, 9 Mar 2020, Michael S. Tsirkin wrote:
> > On Mon, Mar 09, 2020 at 08:18:13PM +0100, BALATON Zoltan wrote:
> > > Some machines operate in "non 100% native mode" where interrupts are
> > > fixed at legacy IDE interrupts and some guests expect this behaviour
> > > without checking based on knowledge about hardware. Even Linux has
> > > arch specific workarounds for this that are activated on such boards
> > > so this needs to be emulated as well.
> > >
> > > Signed-off-by: BALATON Zoltan <bala...@eik.bme.hu>
> > > ---
> > > v2: Don't use PCI_INTERRUPT_LINE in via_ide_set_irq()
> > > v3: Patch pci.c instead of local workaround for PCI reset clearing
> > > PCI_INTERRUPT_PIN config reg
> > >
> > > hw/ide/via.c | 37 +++++++++++++++++++++++++++++--------
> > > hw/mips/mips_fulong2e.c | 2 +-
> > > include/hw/ide.h | 3 ++-
> > > 3 files changed, 32 insertions(+), 10 deletions(-)
> > >
> > > diff --git a/hw/ide/via.c b/hw/ide/via.c
> > > index 096de8dba0..02d29809f2 100644
> > > --- a/hw/ide/via.c
> > > +++ b/hw/ide/via.c
> > > @@ -1,9 +1,10 @@
> > > /*
> > > - * QEMU IDE Emulation: PCI VIA82C686B support.
> > > + * QEMU VIA southbridge IDE emulation (VT82C686B, VT8231)
> > > *
> > > * Copyright (c) 2003 Fabrice Bellard
> > > * Copyright (c) 2006 Openedhand Ltd.
> > > * Copyright (c) 2010 Huacai Chen <zltjiang...@gmail.com>
> > > + * Copyright (c) 2019-2020 BALATON Zoltan
> > > *
> > > * Permission is hereby granted, free of charge, to any person obtaining
> > > a copy
> > > * of this software and associated documentation files (the "Software"),
> > > to deal
> > > @@ -25,6 +26,8 @@
> > > */
> > >
> > > #include "qemu/osdep.h"
> > > +#include "qemu/range.h"
> > > +#include "hw/qdev-properties.h"
> > > #include "hw/pci/pci.h"
> > > #include "migration/vmstate.h"
> > > #include "qemu/module.h"
> > > @@ -111,11 +114,18 @@ static void via_ide_set_irq(void *opaque, int n,
> > > int level)
> > > } else {
> > > d->config[0x70 + n * 8] &= ~0x80;
> > > }
> > > -
> > > level = (d->config[0x70] & 0x80) || (d->config[0x78] & 0x80);
> > > - n = pci_get_byte(d->config + PCI_INTERRUPT_LINE);
> > > - if (n) {
> > > - qemu_set_irq(isa_get_irq(NULL, n), level);
> > > +
> > > + /*
> > > + * Some machines operate in "non 100% native mode" where
> > > PCI_INTERRUPT_LINE
> > > + * is not used but IDE always uses ISA IRQ 14 and 15 even in native
> > > mode.
> > > + * Some guest drivers expect this, often without checking.
> > > + */
> > > + if (!(pci_get_byte(d->config + PCI_CLASS_PROG) & (n ? 4 : 1)) ||
> > > + PCI_IDE(d)->flags & BIT(PCI_IDE_LEGACY_IRQ)) {
> > > + qemu_set_irq(isa_get_irq(NULL, (n ? 15 : 14)), level);
> > > + } else {
> > > + qemu_set_irq(isa_get_irq(NULL, 14), level);
> > > }
> > > }
> > >
> > > @@ -169,7 +179,8 @@ static void via_ide_realize(PCIDevice *dev, Error
> > > **errp)
> > >
> > > pci_config_set_prog_interface(pci_conf, 0x8f); /* native PCI ATA
> > > mode */
> > > pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x000000c0);
> > > - dev->wmask[PCI_INTERRUPT_LINE] = 0xf;
> > > + dev->wmask[PCI_CLASS_PROG] = 5;
> >
> > What's the story here? Why is class suddenly writeable?
>
> The via-ide (function 1 of some VIA southbridge chips) use bits in this reg
> to set legacy compatibility mode as described in VT82C686B and VT8231
> datasheets and Linux writes this on pegasos2 board I'm emulating. See longer
> description in this message:
>
> https://lists.nongnu.org/archive/html/qemu-devel/2020-03/msg00019.html
>
> Regards,
> BALATON Zoltan
Pls add a code comment so people don't have to dig through mailing list
archives.
--
MST
