On Thu, Mar 5, 2020 at 11:30 AM Peter Maydell <peter.mayd...@linaro.org> wrote:
>
> On Thu, 5 Mar 2020 at 19:24, Alistair Francis <alistai...@gmail.com> wrote:
> >
> > On Sat, Feb 29, 2020 at 6:12 AM Stephanos Ioannidis <r...@stephanos.io>
> > wrote:
>
> > > +typedef union {
> > > + struct {
> > > + uint32_t hsion : 1;
> > > + uint32_t hsirdy : 1;
> > > + uint32_t reserved0 : 1;
> > > + uint32_t hsitrim : 5;
> > > + uint32_t hsical : 8;
> > > + uint32_t hseon : 1;
> > > + uint32_t hserdy : 1;
> > > + uint32_t hsebyp : 1;
> > > + uint32_t csson : 1;
> > > + uint32_t reserved1 : 4;
> > > + uint32_t pllon : 1;
> > > + uint32_t pllrdy : 1;
> > > + uint32_t plli2son : 1;
> > > + uint32_t plli2srdy : 1;
> > > + uint32_t reserved2 : 4;
> > > + };
> > > + uint32_t reg;
> > > +} RccCrType;
> >
> > This is a pretty interesting way to represent the registers
>
> Is it portable, though? I thought C bitfield order and
> packing was implementation-defined, which would mean that
> you can't guarantee that this union will give you the
> required thing in the uint32_t half.
Yep, it is implementation defined, this won't work correctly then.
>
> I think it would be better to do this the way that
> other device models do it, and avoid bitfields.
I agree, I would recommend the bit fields I mentioned earlier as that
is similar to what you already have. You don't have to use the
RegisterAccessInfo method if you don't want to. I think the ARM SMMUv3
is an example of using the bit fields with the traditional QEMU
read/write functions.
Alistair
>
> thanks
> -- PMM
