On 2/7/20 5:36 PM, Peter Maydell wrote: >> - return cpsr_read(env) & ~(CPSR_EXEC | CPSR_RESERVED); >> + /* >> + * We store the ARMv8 PSTATE.SS bit in env->uncached_cpsr. >> + * This is convenient for populating SPSR_ELx, but must be >> + * hidden from aarch32 mode, where it is not visible. >> + * >> + * TODO: ARMv8.4-DIT -- need to move SS somewhere else. >> + */ >> + return cpsr_read(env) & ~(CPSR_EXEC | PSTATE_SS); > > So previously we were masking out [23:21], and now we only mask > out [21]. Is this OK because we've now masked everywhere that > might have been able to write non-zero to [23:22] ?
Yes. On the chance that I've missed one, we'll now call anything that fails to do so a bug there, and not here. ;-) > (regarding the TODO comment, I guess the obvious place would > be env->pstate.) That was my thought too. That env->pstate & PSTATE_SS would be where we leave that bit all of the time, even when the rest of pstate is inactive in aa32 mode. r~
