This series fixes APIC ID encoding problems on AMD EPYC CPUs. https://bugzilla.redhat.com/show_bug.cgi?id=1728166
Currently, the APIC ID is decoded based on the sequence sockets->dies->cores->threads. This works for most standard AMD and other vendors' configurations, but this decoding sequence does not follow that of AMD's APIC ID enumeration strictly. In some cases this can cause CPU topology inconsistency. When booting a guest VM, the kernel tries to validate the topology, and finds it inconsistent with the enumeration of EPYC cpu models. To fix the problem we need to build the topology as per the Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors. It is available at https://www.amd.com/system/files/TechDocs/55570-B1_PUB.zip Here is the text from the PPR. Operating systems are expected to use Core::X86::Cpuid::SizeId[ApicIdSize], the number of least significant bits in the Initial APIC ID that indicate core ID within a processor, in constructing per-core CPUID masks. Core::X86::Cpuid::SizeId[ApicIdSize] determines the maximum number of cores (MNC) that the processor could theoretically support, not the actual number of cores that are actually implemented or enabled on the processor, as indicated by Core::X86::Cpuid::SizeId[NC]. Each Core::X86::Apic::ApicId[ApicId] register is preset as follows: • ApicId[6] = Socket ID. • ApicId[5:4] = Node ID. • ApicId[3] = Logical CCX L3 complex ID • ApicId[2:0]= (SMT) ? {LogicalCoreID[1:0],ThreadId} : {1'b0,LogicalCoreID[1:0]} v3: 1. Consolidated the topology information in structure X86CPUTopoInfo. 2. Changed the ccx_id to llc_id as commented by upstream. 3. Generalized the apic id decoding. It is mostly similar to current apic id except that it adds new field llc_id when numa configured. Removes all the hardcoded values. 4. Removed the earlier parse_numa split. And moved the numa node initialization inside the numa_complete_configuration. This is bit cleaner as commented by Eduardo. 5. Added new function init_apicid_fn inside machine_class structure. This will be used to update the apic id handler specific to cpu model. 6. Updated the cpuid unit tests. 7. TODO : Need to figure out how to dynamically update the handlers using cpu models. I might some guidance on that. v2: https://lore.kernel.org/qemu-devel/156779689013.21957.1631551572950676212.stgit@localhost.localdomain/ 1. Introduced the new property epyc to enable new epyc mode. 2. Separated the epyc mode and non epyc mode function. 3. Introduced function pointers in PCMachineState to handle the differences. 4. Mildly tested different combinations to make things are working as expected. 5. TODO : Setting the epyc feature bit needs to be worked out. This feature is supported only on AMD EPYC models. I may need some guidance on that. v1: https://lore.kernel.org/qemu-devel/20190731232032.51786-1-babu.mo...@amd.com/ --- Babu Moger (18): hw/i386: Rename X86CPUTopoInfo structure to X86CPUTopoIDs hw/i386: Introduce X86CPUTopoInfo to contain topology info hw/i386: Consolidate topology functions hw/i386: Introduce initialize_topo_info to initialize X86CPUTopoInfo machine: Add SMP Sockets in CpuTopology hw/core: Add core complex id in X86CPU topology machine: Add a new function init_apicid_fn in MachineClass hw/i386: Update structures for nodes_per_pkg i386: Add CPUX86Family type in CPUX86State hw/386: Add EPYC mode topology decoding functions i386: Cleanup and use the EPYC mode topology functions numa: Split the numa initialization hw/i386: Introduce apicid_from_cpu_idx in PCMachineState hw/i386: Introduce topo_ids_from_apicid handler PCMachineState hw/i386: Introduce apic_id_from_topo_ids handler in PCMachineState hw/i386: Introduce EPYC mode function handlers i386: Fix pkg_id offset for epyc mode tests: Update the Unit tests hw/core/machine-hmp-cmds.c | 3 + hw/core/machine.c | 14 +++ hw/core/numa.c | 62 +++++++++---- hw/i386/pc.c | 132 +++++++++++++++++++--------- include/hw/boards.h | 3 + include/hw/i386/pc.h | 9 ++ include/hw/i386/topology.h | 209 +++++++++++++++++++++++++++++++------------- include/sysemu/numa.h | 5 + qapi/machine.json | 7 + target/i386/cpu.c | 196 ++++++++++++----------------------------- target/i386/cpu.h | 9 ++ tests/test-x86-cpuid.c | 115 ++++++++++++++---------- vl.c | 4 + 13 files changed, 455 insertions(+), 313 deletions(-) --
