+ break;
+ case A_COUNTER_LOW:
+ case A_COUNTER_HIGH:
+ /* Free running counter at 1MHz */
+ r = qemu_clock_get_us(QEMU_CLOCK_VIRTUAL);
+ r >>= 8 * (offset - A_COUNTER_LOW);
+ r &= UINT32_MAX;
+ break;
+ default:
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: bad offset 0x%" HWADDR_PRIx "\n",
+ __func__, offset);
+ break;
+ }
+ trace_bcm2835_sys_timer_read(offset, r);
+
+ return r;
+}
+
+static void bcm2835_sys_timer_write(void *opaque, hwaddr offset,
+ uint64_t value, unsigned size)
+{
+ trace_bcm2835_sys_timer_write(offset, value);
+
+ qemu_log_mask(LOG_UNIMP, "%s: bad offset 0x%" HWADDR_PRIx "\n",
+ __func__, offset);
+}
+
+static const MemoryRegionOps bcm2835_sys_timer_ops = {
+ .read = bcm2835_sys_timer_read,
+ .write = bcm2835_sys_timer_write,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+ .impl = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ },
+};
+
+static void bcm2835_sys_timer_init(Object *obj)
+{
+ SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+ BCM2835SysTimerState *s = BCM2835_SYSTIMER(obj);
+
+ memory_region_init_io(&s->iomem, obj, &bcm2835_sys_timer_ops,
+ s, "bcm2835-sys-timer", 0x20);
+ sysbus_init_mmio(sbd, &s->iomem);
+ sysbus_init_irq(sbd, &s->irq);
+}
+
+static const TypeInfo bcm2835_sys_timer_info = {
+ .name = TYPE_BCM2835_SYSTIMER,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(BCM2835SysTimerState),
+ .instance_init = bcm2835_sys_timer_init,
+};
+
+static void bcm2835_sys_timer_register_types(void)
+{
+ type_register_static(&bcm2835_sys_timer_info);
+}
+
+type_init(bcm2835_sys_timer_register_types);
diff --git a/hw/timer/trace-events b/hw/timer/trace-events
index db02a9142c..81967a1a19 100644
--- a/hw/timer/trace-events
+++ b/hw/timer/trace-events
@@ -87,3 +87,7 @@ pl031_read(uint32_t addr, uint32_t value) "addr 0x%08x value
0x%08x"
pl031_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
pl031_alarm_raised(void) "alarm raised"
pl031_set_alarm(uint32_t ticks) "alarm set for %u ticks"
+
+# bcm2835_systmr.c
+bcm2835_sys_timer_read(uint64_t offset, uint64_t data) "timer read: offset 0x%" PRIx64
" data 0x%" PRIx64
+bcm2835_sys_timer_write(uint64_t offset, uint64_t data) "timer write: offset 0x%" PRIx64
" data 0x%" PRIx64
diff --git a/include/hw/timer/bcm2835_systmr.h
b/include/hw/timer/bcm2835_systmr.h
new file mode 100644
index 0000000000..6ac7f8ec5a
--- /dev/null
+++ b/include/hw/timer/bcm2835_systmr.h
@@ -0,0 +1,30 @@
+/*
+ * BCM2835 SYS timer emulation
+ *
+ * Copyright (c) 2019 Philippe Mathieu-Daudé <f4...@amsat.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 or
+ * (at your option) any later version.
+ */
+
+#ifndef BCM2835_SYSTIMER_H
+#define BCM2835_SYSTIMER_H
+
+#include "hw/sysbus.h"
+#include "hw/irq.h"
+
+#define TYPE_BCM2835_SYSTIMER "bcm2835-sys-timer"
+#define BCM2835_SYSTIMER(obj) \
+ OBJECT_CHECK(BCM2835SysTimerState, (obj), TYPE_BCM2835_SYSTIMER)
+
+typedef struct {
+ /*< private >*/
+ SysBusDevice parent_obj;
+
+ /*< public >*/
+ MemoryRegion iomem;
+ qemu_irq irq;
+} BCM2835SysTimerState;
+
+#endif
