On 9/24/19 8:35 AM, Mark Cave-Ayland wrote:
> Since commit ef96e3ae96 "target/ppc: move FP and VMX registers into aligned
> vsr
> register array" FP registers are no longer stored consecutively in memory and
> so
> the current method of combining FP register pairs into DFP numbers is
> incorrect.
>
> Firstly update the definition of the dh_*_fprp defines in helper.h to reflect
> that FP registers are now stored as part of an array of ppc_vsr_t elements
> rather than plain uint64_t elements, and then introduce a new ppc_fprp_t type
> which conceptually represents a DFP even-odd register pair to be consumed by
> the
> DFP helper functions.
>
> Finally update the new DFP {get,set}_dfp{64,128}() helper functions to convert
> between DFP numbers and DFP even-odd register pairs correctly, making use of
> the
> existing VsrD() macro to access the correct elements regardless of host
> endian.
>
> Fixes: ef96e3ae96 "target/ppc: move FP and VMX registers into aligned vsr
> register array"
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
> ---
> target/ppc/cpu.h | 1 +
> target/ppc/dfp_helper.c | 80 +++++++++++++++++++++--------------------
> target/ppc/helper.h | 2 +-
> 3 files changed, 44 insertions(+), 39 deletions(-)
Yay! I really was getting ahead of things.
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
r~
