On 9/23/19 4:42 PM, Peter Maydell wrote: > On Mon, 23 Sep 2019 at 15:40, Philippe Mathieu-Daudé <phi...@redhat.com> > wrote: >> So currently there is no MIPS-I only CPU. >> Note that the code got written with MIPS32 in mind, and implementing >> MIPS-I requires a considerable amount of change in the codebase. > > ...but MIPS-I binaries should run on MIPS-II and newer CPUs, shouldn't > they?
Some MIPS-I instructions where removed for MIPS-II (as RFE) and they are not implemented. Also some CP0 registers are different. >> IMO it is likely the RFE (Return from Exception) instruction. > > It seems unlikely that a linux userspace binary would be trying to > execute RFE... Oh I thought it was system emulation, indeed it can't be RFE. One GCC release targetting R3000 (Philips PR31700, Toshiba TX39) doesn't emit NOP for branch's delay slot. I remember QEMU fails to run the binaries it generates, but I don't remember how it fails. Libo, can you provide more information about the cross-compiler you use and the flags you use when calling it please? Thanks, Phil.
