On 05/19/2011 03:44 AM, Avi Kivity wrote:
On 05/19/2011 11:30 AM, Jan Kiszka wrote:
>>
>> That's not that simple. We need to tell apart:
>> - if a cpu issued the request, and which one => forward to APIC
> And cpu mode may affect where access is forwarded to. If cpu is in SMM
> mode access to frame buffer may be forwarded to a memory (depends on
> chipset configuration).
So we have a second use case for CPU-local I/O regions?
I wonder if only a single CPU can enter SMM or if all have to. Right now
only the first CPU can switch to that mode, and that affects the
behaviour of the chipset /wrt SMRAM mapping. Is that another hack?
It's a hack. SMM is a per-cpu setting. Effectively it's another address
pin - it changes the meaning of (potentially) all addresses.
Hrm, this may be splitting hairs, but the chipset enables SMM globally.
The processor can enable it by raising a pin but there is only a
single pin.
It may raise/lower the pin on every load/store, but from the chipset's
perspective, it's a global setting (at least in the i440fx).
Regards,
Anthony Liguori
